Symbol: dpll

enum value global

Defined...

• drivers/clk/samsung/clk-exynos5420.c:153:14-153:14: apll, cpll, dpll, epll, rpll, ipll, spll, vpll, mpll,

function parameter

Defined...

• drivers/gpu/drm/i915/display/intel_dpll.c:325:32-325:51: static u32 i9xx_dpll_compute_m(const struct dpll *dpll)
• drivers/gpu/drm/i915/display/intel_dpll.c:776:26-776:45: u32 i9xx_dpll_compute_fp(const struct dpll *dpll)
• drivers/gpu/drm/i915/display/intel_dpll.c:781:32-781:51: static u32 pnv_dpll_compute_fp(const struct dpll *dpll)
• drivers/gpu/drm/i915/display/intel_dpll.c:1025:34-1025:53: static bool ilk_needs_fb_cb_tune(const struct dpll *dpll, int factor)
• drivers/gpu/drm/i915/display/intel_dpll.c:1971:8-1971:27: const struct dpll *dpll)
• drivers/video/fbdev/intelfb/intelfbhw.c:682:60-682:64: static void intelfbhw_get_p1p2(struct intelfb_info *dinfo, int dpll,

record

Declared as a prototype...

• drivers/gpu/drm/i915/display/g4x_dp.h:20:7-20:14: const struct dpll *vlv_get_dpll(struct drm_i915_private *i915);
• drivers/gpu/drm/i915/display/intel_display.h:34:1-34:8: struct dpll;
• drivers/gpu/drm/i915/display/intel_dpll.h:11:1-11:8: struct dpll;

Defined...

• drivers/gpu/drm/i915/display/intel_display_types.h:638:1-648:1: struct dpll {

variable

Defined...

• drivers/ata/pata_hpt37x.c:948:3-948:7: int dpll, adjust;
• drivers/ata/pata_hpt3x2n.c:312:2-312:64: int dpll = hpt3x2n_use_dpll(ap, qc->tf.flags & ATA_TFLAG_WRITE);
• drivers/ata/pata_hpt3x2n.c:328:2-328:64: int dpll = hpt3x2n_use_dpll(ap, qc->tf.flags & ATA_TFLAG_WRITE);
• drivers/gpu/drm/gma500/cdv_intel_display.c:584:2-584:13: u32 dpll = 0, dspcntr, pipeconf;
• drivers/gpu/drm/gma500/cdv_intel_display.c:842:2-842:6: u32 dpll;
• drivers/gpu/drm/gma500/oaktrail_crtc.c:373:2-373:13: u32 dpll = 0, fp = 0, dspcntr, pipeconf;
• drivers/gpu/drm/gma500/oaktrail_hdmi.c:285:2-285:25: u32 dspcntr, pipeconf, dpll, temp;
• drivers/gpu/drm/gma500/psb_intel_display.c:107:2-107:13: u32 dpll = 0, fp = 0, dspcntr, pipeconf;
• drivers/gpu/drm/gma500/psb_intel_display.c:310:2-310:6: u32 dpll;
• drivers/gpu/drm/i915/display/intel_display.c:3822:2-3822:40: u32 dpll = pipe_config->dpll_hw_state.dpll;
• drivers/gpu/drm/i915/display/intel_display.c:3840:2-3840:40: u32 dpll = pipe_config->dpll_hw_state.dpll;
• drivers/gpu/drm/i915/display/intel_display.c:7868:2-7868:6: u32 dpll, fp;
• drivers/gpu/drm/i915/display/intel_dpll.c:812:2-812:6: u32 dpll;
• drivers/gpu/drm/i915/display/intel_dpll.c:891:2-891:6: u32 dpll;
• drivers/gpu/drm/i915/display/intel_dpll.c:1069:2-1069:6: u32 dpll;
• drivers/gpu/drm/i915/display/intel_dpll.c:1585:2-1585:39: u32 dpll = crtc_state->dpll_hw_state.dpll;
• drivers/gpu/drm/i915/display/intel_dvo.c:410:2-410:25: u32 dpll[I915_MAX_PIPES];
• drivers/ptp/ptp_clockmatrix.c:352:2-352:12: u8 dpll = 0;
• drivers/video/fbdev/intelfb/intelfbhw.c:1043:2-1043:7: u32 *dpll, *fp0, *fp1;
• drivers/video/fbdev/intelfb/intelfbhw.c:1279:2-1279:13: const u32 *dpll, *fp0, *fp1, *pipe_conf;