#ifndef __LINUX_USB_SERIAL_WHITEHEAT_H
#define __LINUX_USB_SERIAL_WHITEHEAT_H
#define WHITEHEAT_OPEN 1 /* open the port */
#define WHITEHEAT_CLOSE 2 /* close the port */
#define WHITEHEAT_SETUP_PORT 3 /* change port settings */
#define WHITEHEAT_SET_RTS 4 /* turn RTS on or off */
#define WHITEHEAT_SET_DTR 5 /* turn DTR on or off */
#define WHITEHEAT_SET_BREAK 6 /* turn BREAK on or off */
#define WHITEHEAT_DUMP 7 /* dump memory */
#define WHITEHEAT_STATUS 8 /* get status */
#define WHITEHEAT_PURGE 9 /* clear the UART fifos */
#define WHITEHEAT_GET_DTR_RTS 10 /* get the state of DTR and RTS
for a port */
#define WHITEHEAT_GET_HW_INFO 11 /* get EEPROM info and
hardware ID */
#define WHITEHEAT_REPORT_TX_DONE 12 /* get the next TX done */
#define WHITEHEAT_EVENT 13 /* unsolicited status events */
#define WHITEHEAT_ECHO 14 /* send data to the indicated
IN endpoint */
#define WHITEHEAT_DO_TEST 15 /* perform specified test */
#define WHITEHEAT_CMD_COMPLETE 16 /* reply for some commands */
#define WHITEHEAT_CMD_FAILURE 17 /* reply for failed commands */
struct whiteheat_simple {
__u8 port;
};
#define WHITEHEAT_PAR_NONE 'n' /* no parity */
#define WHITEHEAT_PAR_EVEN 'e' /* even parity */
#define WHITEHEAT_PAR_ODD 'o' /* odd parity */
#define WHITEHEAT_PAR_SPACE '0' /* space (force 0) parity */
#define WHITEHEAT_PAR_MARK '1' /* mark (force 1) parity */
#define WHITEHEAT_SFLOW_NONE 'n' /* no software flow control */
#define WHITEHEAT_SFLOW_RX 'r' /* XOFF/ON is sent when RX
fills/empties */
#define WHITEHEAT_SFLOW_TX 't' /* when received XOFF/ON will
stop/start TX */
#define WHITEHEAT_SFLOW_RXTX 'b' /* both SFLOW_RX and SFLOW_TX */
#define WHITEHEAT_HFLOW_NONE 0x00 /* no hardware flow control */
#define WHITEHEAT_HFLOW_RTS_TOGGLE 0x01 /* RTS is on during transmit,
off otherwise */
#define WHITEHEAT_HFLOW_DTR 0x02 /* DTR is off/on when RX
fills/empties */
#define WHITEHEAT_HFLOW_CTS 0x08 /* when received CTS off/on
will stop/start TX */
#define WHITEHEAT_HFLOW_DSR 0x10 /* when received DSR off/on
will stop/start TX */
#define WHITEHEAT_HFLOW_RTS 0x80 /* RTS is off/on when RX
fills/empties */
struct whiteheat_port_settings {
__u8 port;
__le32 baud;
__u8 bits;
__u8 stop;
__u8 parity;
__u8 sflow;
__u8 xoff;
__u8 xon;
__u8 hflow;
__u8 lloop;
} __attribute__ ((packed));
#define WHITEHEAT_RTS_OFF 0x00
#define WHITEHEAT_RTS_ON 0x01
#define WHITEHEAT_DTR_OFF 0x00
#define WHITEHEAT_DTR_ON 0x01
#define WHITEHEAT_BREAK_OFF 0x00
#define WHITEHEAT_BREAK_ON 0x01
struct whiteheat_set_rdb {
__u8 port;
__u8 state;
};
#define WHITEHEAT_DUMP_MEM_DATA 'd' /* data */
#define WHITEHEAT_DUMP_MEM_IDATA 'i' /* idata */
#define WHITEHEAT_DUMP_MEM_BDATA 'b' /* bdata */
#define WHITEHEAT_DUMP_MEM_XDATA 'x' /* xdata */
struct whiteheat_dump {
__u8 mem_type;
__u16 addr;
__u16 length;
};
#define WHITEHEAT_PURGE_RX 0x01 /* purge rx fifos */
#define WHITEHEAT_PURGE_TX 0x02 /* purge tx fifos */
struct whiteheat_purge {
__u8 port;
__u8 what;
};
struct whiteheat_echo {
__u8 port;
__u8 length;
__u8 echo_data[61];
};
#define WHITEHEAT_TEST_UART_RW 0x01 /* read/write uart registers */
#define WHITEHEAT_TEST_UART_INTR 0x02 /* uart interrupt */
#define WHITEHEAT_TEST_SETUP_CONT 0x03 /* setup for
PORT_CONT/PORT_DISCONT */
#define WHITEHEAT_TEST_PORT_CONT 0x04 /* port connect */
#define WHITEHEAT_TEST_PORT_DISCONT 0x05 /* port disconnect */
#define WHITEHEAT_TEST_UART_CLK_START 0x06 /* uart clock test start */
#define WHITEHEAT_TEST_UART_CLK_STOP 0x07 /* uart clock test stop */
#define WHITEHEAT_TEST_MODEM_FT 0x08 /* modem signals, requires a
loopback cable/connector */
#define WHITEHEAT_TEST_ERASE_EEPROM 0x09 /* erase eeprom */
#define WHITEHEAT_TEST_READ_EEPROM 0x0a /* read eeprom */
#define WHITEHEAT_TEST_PROGRAM_EEPROM 0x0b /* program eeprom */
struct whiteheat_test {
__u8 port;
__u8 test;
__u8 info[32];
};
#define WHITEHEAT_EVENT_MODEM 0x01 /* modem field is valid */
#define WHITEHEAT_EVENT_ERROR 0x02 /* error field is valid */
#define WHITEHEAT_EVENT_FLOW 0x04 /* flow field is valid */
#define WHITEHEAT_EVENT_CONNECT 0x08 /* connect field is valid */
#define WHITEHEAT_FLOW_NONE 0x00 /* no flow control active */
#define WHITEHEAT_FLOW_HARD_OUT 0x01 /* TX is stopped by CTS
(waiting for CTS to go on) */
#define WHITEHEAT_FLOW_HARD_IN 0x02 /* remote TX is stopped
by RTS */
#define WHITEHEAT_FLOW_SOFT_OUT 0x04 /* TX is stopped by XOFF
received (waiting for XON) */
#define WHITEHEAT_FLOW_SOFT_IN 0x08 /* remote TX is stopped by XOFF
transmitted */
#define WHITEHEAT_FLOW_TX_DONE 0x80 /* TX has completed */
struct whiteheat_status_info {
__u8 port;
__u8 event;
__u8 modem;
__u8 error;
__u8 flow;
__u8 connect;
};
struct whiteheat_dr_info {
__u8 mcr;
};
struct whiteheat_hw_info {
__u8 hw_id;
__u8 sw_major_rev;
__u8 sw_minor_rev;
struct whiteheat_hw_eeprom_info {
__u8 b0;
__u8 vendor_id_low;
__u8 vendor_id_high;
__u8 product_id_low;
__u8 product_id_high;
__u8 device_id_low;
__u8 device_id_high;
__u8 not_used_1;
__u8 serial_number_0;
__u8 serial_number_1;
__u8 serial_number_2;
__u8 serial_number_3;
__u8 not_used_2;
__u8 not_used_3;
__u8 checksum_low;
__u8 checksum_high;
} hw_eeprom_info;
};
struct whiteheat_event_info {
__u8 port;
__u8 event;
__u8 info;
};
#define WHITEHEAT_TEST_FAIL 0x00 /* test failed */
#define WHITEHEAT_TEST_UNKNOWN 0x01 /* unknown test requested */
#define WHITEHEAT_TEST_PASS 0xff /* test passed */
struct whiteheat_test_info {
__u8 port;
__u8 test;
__u8 status;
__u8 results[32];
};
#endif