#include "pinctrl-mtk-mt6797.h"
#include "pinctrl-paris.h"
static const struct mtk_pin_field_calc mt6797_pin_mode_range[] = {
PIN_FIELD(0, 261, 0x300, 0x10, 0, 4),
};
static const struct mtk_pin_field_calc mt6797_pin_dir_range[] = {
PIN_FIELD(0, 261, 0x0, 0x10, 0, 1),
};
static const struct mtk_pin_field_calc mt6797_pin_di_range[] = {
PIN_FIELD(0, 261, 0x200, 0x10, 0, 1),
};
static const struct mtk_pin_field_calc mt6797_pin_do_range[] = {
PIN_FIELD(0, 261, 0x100, 0x10, 0, 1),
};
static const struct mtk_pin_reg_calc mt6797_reg_cals[PINCTRL_PIN_REG_MAX] = {
[PINCTRL_PIN_REG_MODE] = MTK_RANGE(mt6797_pin_mode_range),
[PINCTRL_PIN_REG_DIR] = MTK_RANGE(mt6797_pin_dir_range),
[PINCTRL_PIN_REG_DI] = MTK_RANGE(mt6797_pin_di_range),
[PINCTRL_PIN_REG_DO] = MTK_RANGE(mt6797_pin_do_range),
};
static const char * const mt6797_pinctrl_register_base_names[] = {
"gpio", "iocfgl", "iocfgb", "iocfgr", "iocfgt",
};
static const struct mtk_pin_soc mt6797_data = {
.reg_cal = mt6797_reg_cals,
.pins = mtk_pins_mt6797,
.npins = ARRAY_SIZE(mtk_pins_mt6797),
.ngrps = ARRAY_SIZE(mtk_pins_mt6797),
.gpio_m = 0,
.base_names = mt6797_pinctrl_register_base_names,
.nbase_names = ARRAY_SIZE(mt6797_pinctrl_register_base_names),
};
static const struct of_device_id mt6797_pinctrl_of_match[] = {
{ .compatible = "mediatek,mt6797-pinctrl", .data = &mt6797_data },
{ }
};
static struct platform_driver mt6797_pinctrl_driver = {
.driver = {
.name = "mt6797-pinctrl",
.of_match_table = mt6797_pinctrl_of_match,
},
.probe = mtk_paris_pinctrl_probe,
};
static int __init mt6797_pinctrl_init(void)
{
return platform_driver_register(&mt6797_pinctrl_driver);
}
arch_initcall