Symbol: gr

function parameter

Defined...

drivers/gpu/drm/nouveau/nvkm/engine/gr/base.c:73:15-73:31: nvkm_gr_units(struct nvkm_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/base.c:81:19-81:35: nvkm_gr_tlb_flush(struct nvkm_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/base.c:190:58-190:74: enum nvkm_subdev_type type, int inst, bool enable, struct nvkm_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxga102.c:25:28-25:45: ga102_grctx_generate_sm_id(struct gf100_gr *gr, int gpc, int tpc, int sm)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxga102.c:35:27-35:44: ga102_grctx_generate_unkn(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxga102.c:44:30-44:47: ga102_grctx_generate_r419ea8(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.c:1007:30-1007:47: gf100_grctx_generate_r419cb8(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.c:1060:37-1060:54: gf100_grctx_generate_attrib_cb_size(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.c:1068:27-1068:44: gf100_grctx_generate_unkn(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.c:1073:30-1073:47: gf100_grctx_generate_r4060a8(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.c:1093:34-1093:51: gf100_grctx_generate_rop_mapping(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.c:1139:37-1139:54: gf100_grctx_generate_max_ways_evict(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.c:1249:40-1249:57: gf100_grctx_generate_alpha_beta_tables(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.c:1285:29-1285:46: gf100_grctx_generate_tpc_nr(struct gf100_gr *gr, int gpc)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.c:1293:28-1293:45: gf100_grctx_generate_sm_id(struct gf100_gr *gr, int gpc, int tpc, int sm)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.c:1303:33-1303:50: gf100_grctx_generate_floorsweep(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.c:1436:22-1436:39: gf100_grctx_generate(struct gf100_gr *gr, struct gf100_gr_chan *chan, struct nvkm_gpuobj *inst)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf108.c:767:27-767:44: gf108_grctx_generate_unkn(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf117.c:188:38-188:55: gf117_grctx_generate_dist_skip_table(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf117.c:198:34-198:51: gf117_grctx_generate_rop_mapping(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgk104.c:849:30-849:47: gk104_grctx_generate_r418800(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgk104.c:894:27-894:44: gk104_grctx_generate_unkn(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgk104.c:906:30-906:47: gk104_grctx_generate_r419f78(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgk104.c:913:33-913:50: gk104_grctx_generate_gpc_tpc_nr(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgk104.c:920:40-920:57: gk104_grctx_generate_alpha_beta_tables(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgk110.c:817:30-817:47: gk110_grctx_generate_r419eb0(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgm107.c:869:30-869:47: gm107_grctx_generate_r419e00(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgm107.c:944:30-944:47: gm107_grctx_generate_r406500(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgm107.c:950:28-950:45: gm107_grctx_generate_sm_id(struct gf100_gr *gr, int gpc, int tpc, int sm)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgm200.c:31:30-31:47: gm200_grctx_generate_r419a3c(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgm200.c:38:30-38:47: gm200_grctx_generate_r418e94(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgm200.c:46:34-46:51: gm200_grctx_generate_smid_config(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgm200.c:68:31-68:48: gm200_grctx_generate_tpc_mask(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgm200.c:77:30-77:47: gm200_grctx_generate_r406500(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgm200.c:83:38-83:55: gm200_grctx_generate_dist_skip_table(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgp100.c:93:37-93:54: gp100_grctx_generate_attrib_cb_size(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgp100.c:106:34-106:51: gp100_grctx_generate_smid_config(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgp102.c:33:30-33:47: gp102_grctx_generate_r408840(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgp102.c:86:37-86:54: gp102_grctx_generate_attrib_cb_size(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgv100.c:115:34-115:51: gv100_grctx_generate_rop_mapping(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgv100.c:153:30-153:47: gv100_grctx_generate_r400088(struct gf100_gr *gr, bool on)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgv100.c:160:28-160:45: gv100_grctx_generate_sm_id(struct gf100_gr *gr, int gpc, int tpc, int sm)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgv100.c:172:27-172:44: gv100_grctx_generate_unkn(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgv100.c:183:21-183:38: gv100_grctx_unkn88c(struct gf100_gr *gr, bool on)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxtu102.c:25:30-25:47: tu102_grctx_generate_r419c0c(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxtu102.c:34:28-34:45: tu102_grctx_generate_sm_id(struct gf100_gr *gr, int gpc, int tpc, int sm)
drivers/gpu/drm/nouveau/nvkm/engine/gr/g84.c:95:23-95:39: nvkm_gr_vstatus_print(struct nv50_gr *gr, int r,
drivers/gpu/drm/nouveau/nvkm/engine/gr/ga102.c:35:26-35:43: ga102_gr_zbc_clear_color(struct gf100_gr *gr, int zbc)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ga102.c:61:22-61:39: ga102_gr_gpccs_reset(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ga102.c:80:21-80:38: ga102_gr_fecs_reset(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ga102.c:103:30-103:47: ga102_gr_init_rop_exceptions(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ga102.c:113:22-113:39: ga102_gr_init_40a790(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ga102.c:119:23-119:40: ga102_gr_init_gpc_mmu(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ga102.c:132:23-132:40: ga102_gr_oneinit_intr(struct gf100_gr *gr, enum nvkm_intr_type *pvector)
drivers/gpu/drm/nouveau/nvkm/engine/gr/ga102.c:264:15-264:32: ga102_gr_load(struct gf100_gr *gr, int ver, const struct gf100_gr_fwif *fwif)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:49:26-49:43: gf100_gr_zbc_clear_color(struct gf100_gr *gr, int zbc)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:64:24-64:41: gf100_gr_zbc_color_get(struct gf100_gr *gr, int format,
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:100:26-100:43: gf100_gr_zbc_clear_depth(struct gf100_gr *gr, int zbc)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:111:24-111:41: gf100_gr_zbc_depth_get(struct gf100_gr *gr, int format,
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:744:21-744:37: gf100_gr_ctxsw_inst(struct nvkm_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:750:26-750:43: gf100_gr_fecs_ctrl_ctxsw(struct gf100_gr *gr, u32 mthd)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:800:29-800:46: gf100_gr_fecs_halt_pipeline(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:814:31-814:48: gf100_gr_fecs_wfi_golden_save(struct gf100_gr *gr, u32 inst)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:833:28-833:45: gf100_gr_fecs_bind_pointer(struct gf100_gr *gr, u32 inst)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:852:43-852:60: gf100_gr_fecs_set_reglist_virtual_address(struct gf100_gr *gr, u64 addr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:869:41-869:58: gf100_gr_fecs_set_reglist_bind_instance(struct gf100_gr *gr, u32 inst)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:886:43-886:60: gf100_gr_fecs_discover_reglist_image_size(struct gf100_gr *gr, u32 *psize)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:902:25-902:42: gf100_gr_fecs_elpg_bind(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:924:38-924:55: gf100_gr_fecs_discover_pm_image_size(struct gf100_gr *gr, u32 *psize)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:940:41-940:58: gf100_gr_fecs_discover_zcull_image_size(struct gf100_gr *gr, u32 *psize)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:956:35-956:52: gf100_gr_fecs_discover_image_size(struct gf100_gr *gr, u32 *psize)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:972:36-972:53: gf100_gr_fecs_set_watchdog_timeout(struct gf100_gr *gr, u32 timeout)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:998:15-998:32: gf100_gr_rops(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:1005:19-1005:36: gf100_gr_zbc_init(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:1049:20-1049:37: gf100_gr_wait_idle(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:1078:15-1078:32: gf100_gr_mmio(struct gf100_gr *gr, const struct gf100_gr_pack *p)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:1095:15-1095:32: gf100_gr_icmd(struct gf100_gr *gr, const struct gf100_gr_pack *p)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:1135:15-1135:32: gf100_gr_mthd(struct gf100_gr *gr, const struct gf100_gr_pack *p)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:1234:23-1234:40: gf100_gr_trap_gpc_rop(struct gf100_gr *gr, int gpc)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:1295:18-1295:35: gf100_gr_trap_mp(struct gf100_gr *gr, int gpc, int tpc)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:1316:19-1316:36: gf100_gr_trap_tpc(struct gf100_gr *gr, int gpc, int tpc)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:1361:19-1361:36: gf100_gr_trap_gpc(struct gf100_gr *gr, int gpc)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:1409:20-1409:37: gf100_gr_trap_intr(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:1535:28-1535:45: gf100_gr_ctxctl_debug_unit(struct gf100_gr *gr, u32 base)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:1554:23-1554:40: gf100_gr_ctxctl_debug(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:1566:21-1566:38: gf100_gr_ctxctl_isr(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:1707:22-1707:39: gf100_gr_init_csdata(struct gf100_gr *gr,
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:1750:26-1750:43: gf100_gr_init_ctxctl_ext(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:1831:26-1831:43: gf100_gr_init_ctxctl_int(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:1882:22-1882:39: gf100_gr_init_ctxctl(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:1895:24-1895:41: gf100_gr_oneinit_sm_id(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:1913:24-1913:41: gf100_gr_oneinit_tiles(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:2169:31-2169:48: gf100_gr_init_num_tpc_per_gpc(struct gf100_gr *gr, bool pd, bool ds)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:2186:22-2186:39: gf100_gr_init_400054(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:2192:26-2192:43: gf100_gr_init_exception2(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:2201:30-2201:47: gf100_gr_init_rop_exceptions(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:2215:33-2215:50: gf100_gr_init_shader_exceptions(struct gf100_gr *gr, int gpc, int tpc)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:2223:27-2223:44: gf100_gr_init_tex_hww_esr(struct gf100_gr *gr, int gpc, int tpc)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:2230:22-2230:39: gf100_gr_init_419eb4(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:2237:22-2237:39: gf100_gr_init_419cc0(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:2251:22-2251:39: gf100_gr_init_40601c(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:2257:31-2257:48: gf100_gr_init_fecs_exceptions(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:2264:23-2264:40: gf100_gr_init_gpc_mmu(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:2280:31-2280:48: gf100_gr_init_num_active_ltcs(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:2287:21-2287:38: gf100_gr_init_zcull(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:2315:33-2315:50: gf100_gr_init_vsc_stream_master(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:2342:15-2342:32: gf100_gr_init(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:2466:21-2466:38: gf100_gr_fecs_reset(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:2549:15-2549:32: gf100_gr_nofw(struct gf100_gr *gr, int ver, const struct gf100_gr_fwif *fwif)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:2556:18-2556:35: gf100_gr_load_fw(struct gf100_gr *gr, const char *name,
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:2583:15-2583:32: gf100_gr_load(struct gf100_gr *gr, int ver, const struct gf100_gr_fwif *fwif)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf108.c:107:23-107:40: gf108_gr_init_r405a14(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf117.c:124:21-124:38: gf117_gr_init_zcull(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gk104.c:391:28-391:45: gk104_gr_init_sked_hww_esr(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gk104.c:397:31-397:48: gk104_gr_init_fecs_exceptions(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gk104.c:406:31-406:48: gk104_gr_init_rop_active_fbps(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gk104.c:415:30-415:47: gk104_gr_init_ppc_exceptions(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gk104.c:430:33-430:50: gk104_gr_init_vsc_stream_master(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gk110.c:339:22-339:39: gk110_gr_init_419eb4(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gk20a.c:156:29-156:46: gk20a_gr_wait_mem_scrubbing(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gk20a.c:181:34-181:51: gk20a_gr_set_hww_esr_report_mask(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gk20a.c:189:15-189:32: gk20a_gr_init(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gk20a.c:277:19-277:36: gk20a_gr_load_net(struct gf100_gr *gr, const char *path, const char *name, int ver,
drivers/gpu/drm/nouveau/nvkm/engine/gr/gk20a.c:294:18-294:35: gk20a_gr_load_sw(struct gf100_gr *gr, const char *path, int ver)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gk20a.c:317:15-317:32: gk20a_gr_load(struct gf100_gr *gr, int ver, const struct gf100_gr_fwif *fwif)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gm107.c:288:22-288:39: gm107_gr_init_400054(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gm107.c:294:33-294:50: gm107_gr_init_shader_exceptions(struct gf100_gr *gr, int gpc, int tpc)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gm107.c:302:22-302:39: gm107_gr_init_504430(struct gf100_gr *gr, int gpc, int tpc)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gm107.c:309:22-309:39: gm107_gr_init_bios_2(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gm107.c:334:20-334:37: gm107_gr_init_bios(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gm107.c:363:23-363:40: gm107_gr_init_gpc_mmu(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gm200.c:35:15-35:32: gm200_gr_nofw(struct gf100_gr *gr, int ver, const struct gf100_gr_fwif *fwif)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gm200.c:92:15-92:32: gm200_gr_rops(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gm200.c:98:28-98:45: gm200_gr_init_ds_hww_esr_2(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gm200.c:106:31-106:48: gm200_gr_init_num_active_ltcs(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gm200.c:114:23-114:40: gm200_gr_init_gpc_mmu(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gm200.c:128:31-128:48: gm200_gr_init_rop_active_fbps(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gm200.c:152:24-152:41: gm200_gr_oneinit_sm_id(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gm200.c:159:24-159:41: gm200_gr_oneinit_tiles(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gm200.c:222:15-222:32: gm200_gr_load(struct gf100_gr *gr, int ver, const struct gf100_gr_fwif *fwif)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gm20b.c:81:23-81:40: gm20b_gr_init_gpc_mmu(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gm20b.c:109:34-109:51: gm20b_gr_set_hww_esr_report_mask(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gm20b.c:141:15-141:32: gm20b_gr_load(struct gf100_gr *gr, int ver, const struct gf100_gr_fwif *fwif)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gp100.c:33:26-33:43: gp100_gr_zbc_clear_color(struct gf100_gr *gr, int zbc)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gp100.c:52:26-52:43: gp100_gr_zbc_clear_depth(struct gf100_gr *gr, int zbc)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gp100.c:72:33-72:50: gp100_gr_init_shader_exceptions(struct gf100_gr *gr, int gpc, int tpc)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gp100.c:80:22-80:39: gp100_gr_init_419c9c(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gp100.c:88:31-88:48: gp100_gr_init_fecs_exceptions(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gp100.c:94:31-94:48: gp100_gr_init_rop_active_fbps(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gp102.c:30:28-30:45: gp102_gr_zbc_clear_stencil(struct gf100_gr *gr, int zbc)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gp102.c:44:26-44:43: gp102_gr_zbc_stencil_get(struct gf100_gr *gr, int format,
drivers/gpu/drm/nouveau/nvkm/engine/gr/gp102.c:86:29-86:46: gp102_gr_init_swdx_pes_mask(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gv100.c:28:18-28:35: gv100_gr_trap_sm(struct gf100_gr *gr, int gpc, int tpc, int sm)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gv100.c:49:18-49:35: gv100_gr_trap_mp(struct gf100_gr *gr, int gpc, int tpc)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gv100.c:56:22-56:39: gv100_gr_init_4188a4(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gv100.c:64:33-64:50: gv100_gr_init_shader_exceptions(struct gf100_gr *gr, int gpc, int tpc)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gv100.c:75:22-75:39: gv100_gr_init_504430(struct gf100_gr *gr, int gpc, int tpc)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gv100.c:82:22-82:39: gv100_gr_init_419bd8(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gv100.c:89:27-89:44: gv100_gr_nonpes_aware_tpc(struct gf100_gr *gr, u32 gpc, u32 tpc)
drivers/gpu/drm/nouveau/nvkm/engine/gr/gv100.c:106:28-106:45: gv100_gr_scg_estimate_perf(struct gf100_gr *gr, unsigned long *gpc_tpc_mask,
drivers/gpu/drm/nouveau/nvkm/engine/gr/gv100.c:227:24-227:41: gv100_gr_oneinit_sm_id(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv04.c:1072:17-1072:33: nv04_gr_channel(struct nv04_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv04.c:1114:24-1114:40: nv04_gr_context_switch(struct nv04_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv04.c:1211:14-1211:30: nv04_gr_idle(struct nvkm_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c:547:17-547:33: nv10_gr_channel(struct nv10_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c:786:30-786:46: nv10_gr_ctx_regs_find_offset(struct nv10_gr *gr, int reg)
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c:799:30-799:46: nv17_gr_ctx_regs_find_offset(struct nv10_gr *gr, int reg)
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c:932:24-932:40: nv10_gr_context_switch(struct nv10_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv40.c:34:15-34:31: nv40_gr_units(struct nvkm_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv50.c:33:15-33:31: nv50_gr_units(struct nvkm_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv50.c:240:19-240:35: nv50_gr_prop_trap(struct nv50_gr *gr, u32 ustatus_addr, u32 ustatus, u32 tp)
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv50.c:282:17-282:33: nv50_gr_mp_trap(struct nv50_gr *gr, int tpid, int display)
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv50.c:325:17-325:33: nv50_gr_tp_trap(struct nv50_gr *gr, int type, u32 ustatus_old,
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv50.c:395:22-395:38: nv50_gr_trap_handler(struct nv50_gr *gr, u32 display,
drivers/gpu/drm/nouveau/nvkm/engine/gr/tu102.c:28:31-28:48: tu102_gr_init_fecs_exceptions(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/tu102.c:34:18-34:35: tu102_gr_init_fs(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/tu102.c:53:21-53:38: tu102_gr_init_zcull(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/tu102.c:81:23-81:40: tu102_gr_init_gpc_mmu(struct gf100_gr *gr)
drivers/gpu/drm/nouveau/nvkm/engine/gr/tu102.c:210:15-210:32: tu102_gr_load(struct gf100_gr *gr, int ver, const struct gf100_gr_fwif *fwif)
fs/dlm/lock.c:2519:31-2519:47: static int lock_requires_bast(struct dlm_lkb *gr, int high, int cw)
fs/dlm/lock.c:2569:31-2569:47: static int modes_require_bast(struct dlm_lkb *gr, struct dlm_lkb *rq)

variable

Defined...

arch/x86/include/asm/uv/uv_hub.h:392:2-392:43: struct uv_gam_range_s *gr = uv_hub_info->gr_table;
arch/x86/include/asm/uv/uv_hub.h:409:2-409:45: struct uv_gam_range_s *gr = uv_gam_range(pa);
drivers/clk/clk-gemini.c:226:2-226:28: struct gemini_reset *gr = to_gemini_reset(rcdev);
drivers/clk/clk-gemini.c:249:2-249:28: struct gemini_reset *gr = to_gemini_reset(rcdev);
drivers/clk/clk-gemini.c:273:2-273:23: struct gemini_reset *gr;
drivers/gpu/drm/nouveau/nouveau_abi16.c:180:2-180:23: struct nvkm_gr *gr = nvxx_gr(device);
drivers/gpu/drm/nouveau/nvkm/engine/gr/base.c:31:2-31:31: struct nvkm_gr *gr = device->gr;
drivers/gpu/drm/nouveau/nvkm/engine/gr/base.c:40:2-40:31: struct nvkm_gr *gr = device->gr;
drivers/gpu/drm/nouveau/nvkm/engine/gr/base.c:49:2-49:31: struct nvkm_gr *gr = device->gr;
drivers/gpu/drm/nouveau/nvkm/engine/gr/base.c:58:2-58:23: struct nvkm_gr *gr = nvkm_gr(engine);
drivers/gpu/drm/nouveau/nvkm/engine/gr/base.c:67:2-67:23: struct nvkm_gr *gr = nvkm_gr(engine);
drivers/gpu/drm/nouveau/nvkm/engine/gr/base.c:91:2-91:23: struct nvkm_gr *gr = nvkm_gr(oclass->engine);
drivers/gpu/drm/nouveau/nvkm/engine/gr/base.c:116:2-116:23: struct nvkm_gr *gr = nvkm_gr(oclass->engine);
drivers/gpu/drm/nouveau/nvkm/engine/gr/base.c:125:2-125:23: struct nvkm_gr *gr = nvkm_gr(engine);
drivers/gpu/drm/nouveau/nvkm/engine/gr/base.c:132:2-132:23: struct nvkm_gr *gr = nvkm_gr(engine);
drivers/gpu/drm/nouveau/nvkm/engine/gr/base.c:141:2-141:23: struct nvkm_gr *gr = nvkm_gr(engine);
drivers/gpu/drm/nouveau/nvkm/engine/gr/base.c:152:2-152:23: struct nvkm_gr *gr = nvkm_gr(engine);
drivers/gpu/drm/nouveau/nvkm/engine/gr/base.c:159:2-159:23: struct nvkm_gr *gr = nvkm_gr(engine);
drivers/gpu/drm/nouveau/nvkm/engine/gr/base.c:168:2-168:23: struct nvkm_gr *gr = nvkm_gr(engine);
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.c:1034:2-1034:30: struct gf100_gr *gr = chan->gr;
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.c:1344:2-1344:30: struct gf100_gr *gr = chan->gr;
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf108.c:738:2-738:30: struct gf100_gr *gr = chan->gr;
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf117.c:246:2-246:30: struct gf100_gr *gr = chan->gr;
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgk20a.c:30:2-30:30: struct gf100_gr *gr = chan->gr;
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgm107.c:902:2-902:30: struct gf100_gr *gr = chan->gr;
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgm20b.c:27:2-27:30: struct gf100_gr *gr = chan->gr;
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgp100.c:44:2-44:30: struct gf100_gr *gr = chan->gr;
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgp102.c:42:2-42:30: struct gf100_gr *gr = chan->gr;
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgv100.c:64:2-64:30: struct gf100_gr *gr = chan->gr;
drivers/gpu/drm/nouveau/nvkm/engine/gr/g84.c:117:2-117:23: struct nv50_gr *gr = nv50_gr(base);
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:163:2-163:24: struct gf100_gr *gr = gf100_gr(nvkm_gr(object->engine));
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:209:2-209:24: struct gf100_gr *gr = gf100_gr(nvkm_gr(object->engine));
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:301:2-301:24: struct gf100_gr *gr = gf100_gr(base);
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:324:2-324:30: struct gf100_gr *gr = chan->gr;
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:381:2-381:24: struct gf100_gr *gr = gf100_gr(base);
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:772:2-772:24: struct gf100_gr *gr = gf100_gr(base);
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:787:2-787:24: struct gf100_gr *gr = gf100_gr(base);
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:984:2-984:24: struct gf100_gr *gr = gf100_gr(base);
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:1162:2-1162:24: struct gf100_gr *gr = gf100_gr(base);
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:1608:2-1608:24: struct gf100_gr *gr = container_of(inth, typeof(*gr), base.engine.subdev.inth);
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:1991:2-1991:24: struct gf100_gr *gr = gf100_gr(base);
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:2066:2-2066:24: struct gf100_gr *gr = gf100_gr(base);
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:2117:2-2117:24: struct gf100_gr *gr = gf100_gr(base);
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:2130:2-2130:24: struct gf100_gr *gr = gf100_gr(base);
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:2326:2-2326:24: struct gf100_gr *gr = gf100_gr(base);
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c:2611:2-2611:19: struct gf100_gr *gr;
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv04.c:1151:2-1151:29: struct nv04_gr *gr = chan->gr;
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv04.c:1164:2-1164:29: struct nv04_gr *gr = chan->gr;
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv04.c:1187:2-1187:23: struct nv04_gr *gr = nv04_gr(base);
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv04.c:1274:2-1274:23: struct nv04_gr *gr = nv04_gr(base);
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv04.c:1330:2-1330:23: struct nv04_gr *gr = nv04_gr(base);
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv04.c:1418:2-1418:18: struct nv04_gr *gr;
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c:434:2-434:34: struct nvkm_gr *gr = &chan->gr->base;
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c:507:2-507:34: struct nvkm_gr *gr = &chan->gr->base;
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c:562:2-562:29: struct nv10_gr *gr = chan->gr;
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c:581:2-581:29: struct nv10_gr *gr = chan->gr;
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c:632:2-632:29: struct nv10_gr *gr = chan->gr;
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c:814:2-814:29: struct nv10_gr *gr = chan->gr;
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c:885:2-885:29: struct nv10_gr *gr = chan->gr;
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c:912:2-912:29: struct nv10_gr *gr = chan->gr;
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c:957:2-957:29: struct nv10_gr *gr = chan->gr;
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c:974:2-974:29: struct nv10_gr *gr = chan->gr;
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c:1005:2-1005:23: struct nv10_gr *gr = nv10_gr(base);
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c:1051:2-1051:23: struct nv10_gr *gr = nv10_gr(base);
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c:1083:2-1083:23: struct nv10_gr *gr = nv10_gr(base);
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c:1138:2-1138:23: struct nv10_gr *gr = nv10_gr(base);
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c:1178:2-1178:18: struct nv10_gr *gr;
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c:20:2-20:29: struct nv20_gr *gr = chan->gr;
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c:33:2-33:29: struct nv20_gr *gr = chan->gr;
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c:78:2-78:23: struct nv20_gr *gr = nv20_gr(base);
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c:151:2-151:23: struct nv20_gr *gr = nv20_gr(base);
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c:182:2-182:23: struct nv20_gr *gr = nv20_gr(base);
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c:222:2-222:23: struct nv20_gr *gr = nv20_gr(base);
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c:231:2-231:23: struct nv20_gr *gr = nv20_gr(base);
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c:326:2-326:23: struct nv20_gr *gr = nv20_gr(base);
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c:335:2-335:18: struct nv20_gr *gr;
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv25.c:24:2-24:23: struct nv20_gr *gr = nv20_gr(base);
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv2a.c:24:2-24:23: struct nv20_gr *gr = nv20_gr(base);
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv30.c:25:2-25:23: struct nv20_gr *gr = nv20_gr(base);
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv30.c:106:2-106:23: struct nv20_gr *gr = nv20_gr(base);
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv34.c:24:2-24:23: struct nv20_gr *gr = nv20_gr(base);
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv35.c:24:2-24:23: struct nv20_gr *gr = nv20_gr(base);
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv40.c:78:2-78:29: struct nv40_gr *gr = chan->gr;
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv40.c:95:2-95:29: struct nv40_gr *gr = chan->gr;
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv40.c:151:2-151:23: struct nv40_gr *gr = nv40_gr(base);
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv40.c:175:2-175:23: struct nv40_gr *gr = nv40_gr(base);
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv40.c:234:2-234:23: struct nv40_gr *gr = nv40_gr(base);
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv40.c:289:2-289:23: struct nv40_gr *gr = nv40_gr(base);
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv40.c:434:2-434:18: struct nv40_gr *gr;
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv44.c:33:2-33:23: struct nv40_gr *gr = nv40_gr(base);
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv50.c:72:2-72:45: struct nv50_gr *gr = nv50_gr_chan(object)->gr;
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv50.c:92:2-92:23: struct nv50_gr *gr = nv50_gr(base);
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv50.c:622:2-622:23: struct nv50_gr *gr = nv50_gr(base);
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv50.c:681:2-681:23: struct nv50_gr *gr = nv50_gr(base);
drivers/gpu/drm/nouveau/nvkm/engine/gr/nv50.c:766:2-766:18: struct nv50_gr *gr;
drivers/media/usb/gspca/zc3xx.c:5714:2-5714:10: u8 gr[16];
drivers/mmc/core/mmc_test.c:2940:3-2940:35: struct mmc_test_general_result *gr;
drivers/mmc/core/mmc_test.c:3022:2-3022:34: struct mmc_test_general_result *gr, *grs;
drivers/mmc/core/mmc_test.c:3049:2-3049:34: struct mmc_test_general_result *gr;
drivers/staging/media/atomisp/pci/isp/kernels/dp/dp_1.0/ia_css_dp.host.c:52:2-52:19: int gr = from->gr;
drivers/usb/dwc2/core.c:39:2-39:28: struct dwc2_gregs_backup *gr;
drivers/usb/dwc2/core.c:71:2-71:28: struct dwc2_gregs_backup *gr;
drivers/usb/dwc2/core.c:110:2-110:28: struct dwc2_gregs_backup *gr;
drivers/usb/dwc2/core.c:150:2-150:28: struct dwc2_gregs_backup *gr;
drivers/usb/dwc2/gadget.c:5387:2-5387:28: struct dwc2_gregs_backup *gr;
drivers/usb/dwc2/hcd.c:4624:2-4624:28: struct dwc2_gregs_backup *gr;
drivers/usb/dwc2/hcd.c:5579:2-5579:28: struct dwc2_gregs_backup *gr;
drivers/usb/dwc2/platform.c:261:2-261:28: struct dwc2_gregs_backup *gr;
fs/dlm/lock.c:2586:2-2586:18: struct dlm_lkb *gr;