Symbol: optc

function parameter

Defined...

• drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c:64:3-64:28: struct timing_generator *optc,
• drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c:93:34-93:59: static void optc1_disable_stereo(struct timing_generator *optc)
• drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c:106:3-106:28: struct timing_generator *optc,
• drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c:118:3-118:28: struct timing_generator *optc,
• drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c:128:3-128:28: struct timing_generator *optc,
• drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c:154:2-154:27: struct timing_generator *optc,
• drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c:340:27-340:52: void optc1_set_vtg_params(struct timing_generator *optc,
• drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c:385:41-385:66: void optc1_set_blank_data_double_buffer(struct timing_generator *optc, bool enable)
• drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c:406:37-406:62: void optc1_set_timing_double_buffer(struct timing_generator *optc, bool enable)
• drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c:420:32-420:57: static void optc1_unblank_crtc(struct timing_generator *optc)
• drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c:444:30-444:55: static void optc1_blank_crtc(struct timing_generator *optc)
• drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c:455:22-455:47: void optc1_set_blank(struct timing_generator *optc,
• drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c:464:23-464:48: bool optc1_is_blanked(struct timing_generator *optc)
• drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c:477:30-477:55: void optc1_enable_optc_clock(struct timing_generator *optc, bool enable)
• drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c:518:31-518:56: static bool optc1_enable_crtc(struct timing_generator *optc)
• drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c:550:25-550:50: bool optc1_disable_crtc(struct timing_generator *optc)
• drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c:574:3-574:28: struct timing_generator *optc,
• drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c:586:2-586:27: struct timing_generator *optc,
• drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c:655:35-655:60: uint32_t optc1_get_vblank_counter(struct timing_generator *optc)
• drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c:666:17-666:42: void optc1_lock(struct timing_generator *optc)
• drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c:682:19-682:44: void optc1_unlock(struct timing_generator *optc)
• drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c:692:25-692:50: void optc1_get_position(struct timing_generator *optc,
• drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c:705:30-705:55: bool optc1_is_counter_moving(struct timing_generator *optc)
• drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c:720:2-720:27: struct timing_generator *optc)
• drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c:734:34-734:59: void optc1_disable_reset_trigger(struct timing_generator *optc)
• drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c:747:33-747:58: void optc1_enable_reset_trigger(struct timing_generator *optc, int source_tg_inst)
• drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c:782:3-782:28: struct timing_generator *optc,
• drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c:826:27-826:52: void optc1_wait_for_state(struct timing_generator *optc,
• drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c:850:2-850:27: struct timing_generator *optc,
• drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c:860:2-860:27: struct timing_generator *optc,
• drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c:883:40-883:65: static void optc1_setup_manual_trigger(struct timing_generator *optc)
• drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c:901:42-901:67: static void optc1_program_manual_trigger(struct timing_generator *optc)
• drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c:919:2-919:27: struct timing_generator *optc,
• drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c:954:31-954:56: void optc1_set_vtotal_min_max(struct timing_generator *optc, int vtotal_min, int vtotal_max)
• drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c:966:2-966:27: struct timing_generator *optc,
• drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c:1225:2-1225:27: struct timing_generator *optc,
• drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c:1244:33-1244:58: static void optc1_enable_stereo(struct timing_generator *optc,
• drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c:1276:27-1276:52: void optc1_program_stereo(struct timing_generator *optc,
• drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c:1286:31-1286:56: bool optc1_is_stereo_left_eye(struct timing_generator *optc)
• drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c:1388:32-1388:57: bool optc1_get_otg_active_size(struct timing_generator *optc,
• drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c:1419:33-1419:58: void optc1_clear_optc_underflow(struct timing_generator *optc)
• drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c:1426:20-1426:45: void optc1_tg_init(struct timing_generator *optc)
• drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c:1433:26-1433:51: bool optc1_is_tg_enabled(struct timing_generator *optc)
• drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c:1444:39-1444:64: bool optc1_is_optc_underflow_occurred(struct timing_generator *optc)
• drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c:1456:26-1456:51: bool optc1_configure_crc(struct timing_generator *optc,
• drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c:1515:20-1515:45: bool optc1_get_crc(struct timing_generator *optc,
• drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.c:48:24-48:49: bool optc2_enable_crtc(struct timing_generator *optc)
• drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.c:86:20-86:45: void optc2_set_gsl(struct timing_generator *optc,
• drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.c:106:3-106:28: struct timing_generator *optc,
• drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.c:132:27-132:52: void optc2_set_dsc_config(struct timing_generator *optc,
• drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.c:152:27-152:52: void optc2_get_dsc_status(struct timing_generator *optc,
• drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.c:168:27-168:52: void optc2_set_odm_bypass(struct timing_generator *optc,
• drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.c:188:28-188:53: void optc2_set_odm_combine(struct timing_generator *optc, int *opp_id, int opp_cnt,
• drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.c:229:28-229:53: void optc2_get_optc_source(struct timing_generator *optc,
• drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.c:252:34-252:59: static void optc2_set_dwb_source(struct timing_generator *optc,
• drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.c:388:30-388:55: void optc2_triplebuffer_lock(struct timing_generator *optc)
• drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.c:406:32-406:57: void optc2_triplebuffer_unlock(struct timing_generator *optc)
• drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.c:418:37-418:62: void optc2_lock_doublebuffer_enable(struct timing_generator *optc)
• drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.c:445:38-445:63: void optc2_lock_doublebuffer_disable(struct timing_generator *optc)
• drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.c:461:33-461:58: void optc2_setup_manual_trigger(struct timing_generator *optc)
• drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.c:486:35-486:60: void optc2_program_manual_trigger(struct timing_generator *optc)
• drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.c:494:26-494:51: bool optc2_configure_crc(struct timing_generator *optc,
• drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.c:507:37-507:62: void optc2_get_last_used_drr_vtotal(struct timing_generator *optc, uint32_t *refresh_rate)
• drivers/gpu/drm/amd/display/dc/dcn201/dcn201_optc.c:47:39-47:64: static void optc201_triplebuffer_lock(struct timing_generator *optc)
• drivers/gpu/drm/amd/display/dc/dcn201/dcn201_optc.c:63:41-63:66: static void optc201_triplebuffer_unlock(struct timing_generator *optc)
• drivers/gpu/drm/amd/display/dc/dcn201/dcn201_optc.c:75:2-75:27: struct timing_generator *optc,
• drivers/gpu/drm/amd/display/dc/dcn201/dcn201_optc.c:125:37-125:62: static void optc201_get_optc_source(struct timing_generator *optc,
• drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.c:45:30-45:55: void optc3_triplebuffer_lock(struct timing_generator *optc)
• drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.c:65:37-65:62: void optc3_lock_doublebuffer_enable(struct timing_generator *optc)
• drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.c:102:38-102:63: void optc3_lock_doublebuffer_disable(struct timing_generator *optc)
• drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.c:119:17-119:42: void optc3_lock(struct timing_generator *optc)
• drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.c:135:24-135:49: void optc3_set_out_mux(struct timing_generator *optc, enum otg_out_mux_dest dest)
• drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.c:142:32-142:57: void optc3_program_blank_color(struct timing_generator *optc,
• drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.c:158:35-158:60: void optc3_set_drr_trigger_window(struct timing_generator *optc,
• drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.c:168:36-168:61: void optc3_set_vtotal_change_limit(struct timing_generator *optc,
• drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.c:184:27-184:52: void optc3_set_dsc_config(struct timing_generator *optc,
• drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.c:195:27-195:52: void optc3_set_odm_bypass(struct timing_generator *optc,
• drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.c:218:28-218:53: void optc3_set_odm_combine(struct timing_generator *optc, int *opp_id, int opp_cnt,
• drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.c:287:44-287:69: static void optc3_set_timing_double_buffer(struct timing_generator *optc, bool enable)
• drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.c:296:48-296:73: void optc3_wait_drr_doublebuffer_pending_clear(struct timing_generator *optc)
• drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.c:304:31-304:56: void optc3_set_vtotal_min_max(struct timing_generator *optc, int vtotal_min, int vtotal_max)
• drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.c:314:20-314:45: void optc3_tg_init(struct timing_generator *optc)
• drivers/gpu/drm/amd/display/dc/dcn301/dcn301_optc.c:53:2-53:27: struct timing_generator *optc,
• drivers/gpu/drm/amd/display/dc/dcn301/dcn301_optc.c:97:35-97:60: void optc301_setup_manual_trigger(struct timing_generator *optc)
• drivers/gpu/drm/amd/display/dc/dcn31/dcn31_optc.c:43:36-43:61: static void optc31_set_odm_combine(struct timing_generator *optc, int *opp_id, int opp_cnt,
• drivers/gpu/drm/amd/display/dc/dcn31/dcn31_optc.c:97:32-97:57: static bool optc31_enable_crtc(struct timing_generator *optc)
• drivers/gpu/drm/amd/display/dc/dcn31/dcn31_optc.c:123:33-123:58: static bool optc31_disable_crtc(struct timing_generator *optc)
• drivers/gpu/drm/amd/display/dc/dcn31/dcn31_optc.c:144:36-144:61: bool optc31_immediate_disable_crtc(struct timing_generator *optc)
• drivers/gpu/drm/amd/display/dc/dcn31/dcn31_optc.c:167:2-167:27: struct timing_generator *optc,
• drivers/gpu/drm/amd/display/dc/dcn31/dcn31_optc.c:215:21-215:46: void optc3_init_odm(struct timing_generator *optc)
• drivers/gpu/drm/amd/display/dc/dcn314/dcn314_optc.c:50:37-50:62: static void optc314_set_odm_combine(struct timing_generator *optc, int *opp_id, int opp_cnt,
• drivers/gpu/drm/amd/display/dc/dcn314/dcn314_optc.c:106:33-106:58: static bool optc314_enable_crtc(struct timing_generator *optc)
• drivers/gpu/drm/amd/display/dc/dcn314/dcn314_optc.c:132:34-132:59: static bool optc314_disable_crtc(struct timing_generator *optc)
• drivers/gpu/drm/amd/display/dc/dcn314/dcn314_optc.c:153:46-153:71: static void optc314_phantom_crtc_post_enable(struct timing_generator *optc)
• drivers/gpu/drm/amd/display/dc/dcn314/dcn314_optc.c:164:36-164:61: static void optc314_set_odm_bypass(struct timing_generator *optc,
• drivers/gpu/drm/amd/display/dc/dcn314/dcn314_optc.c:187:50-187:75: static void optc314_set_h_timing_div_manual_mode(struct timing_generator *optc, bool manual_mode)
• drivers/gpu/drm/amd/display/dc/dcn32/dcn32_optc.c:45:36-45:61: static void optc32_set_odm_combine(struct timing_generator *optc, int *opp_id, int opp_cnt,
• drivers/gpu/drm/amd/display/dc/dcn32/dcn32_optc.c:101:42-101:67: void optc32_set_h_timing_div_manual_mode(struct timing_generator *optc, bool manual_mode)
• drivers/gpu/drm/amd/display/dc/dcn32/dcn32_optc.c:115:32-115:57: static bool optc32_enable_crtc(struct timing_generator *optc)
• drivers/gpu/drm/amd/display/dc/dcn32/dcn32_optc.c:141:33-141:58: static bool optc32_disable_crtc(struct timing_generator *optc)
• drivers/gpu/drm/amd/display/dc/dcn32/dcn32_optc.c:162:45-162:70: static void optc32_phantom_crtc_post_enable(struct timing_generator *optc)
• drivers/gpu/drm/amd/display/dc/dcn32/dcn32_optc.c:173:40-173:65: static void optc32_disable_phantom_otg(struct timing_generator *optc)
• drivers/gpu/drm/amd/display/dc/dcn32/dcn32_optc.c:180:35-180:60: static void optc32_set_odm_bypass(struct timing_generator *optc,
• drivers/gpu/drm/amd/display/dc/dcn32/dcn32_optc.c:203:41-203:66: static void optc32_setup_manual_trigger(struct timing_generator *optc)
• drivers/gpu/drm/amd/display/dc/dcn32/dcn32_optc.c:229:2-229:27: struct timing_generator *optc,
• drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c:181:32-181:57: void optc3_fpu_set_vrr_m_const(struct timing_generator *optc,

record

Defined...

• drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.h:567:1-592:1: struct optc {

variable

Defined...

• drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c:2187:2-2187:27: struct timing_generator *optc;