Symbol: _l

variable

Defined...

• arch/x86/events/intel/p4.c:1358:2-1358:2: rdmsr(MSR_IA32_MISC_ENABLE, low, high);
• arch/x86/hyperv/hv_apic.c:62:3-62:3: rdmsr(HV_X64_MSR_EOI, reg_val, hi);
• arch/x86/hyperv/hv_apic.c:66:3-66:3: rdmsr(HV_X64_MSR_TPR, reg_val, hi);
• arch/x86/kernel/acpi/sleep.c:96:7-96:7: if (!rdmsr_safe(MSR_IA32_MISC_ENABLE,
• arch/x86/kernel/apic/apic.c:2728:4-2728:4: rdmsr(MSR_IA32_APICBASE, l, h);
• arch/x86/kernel/cpu/amd.c:634:2-634:2: rdmsr_safe(MSR_AMD64_PATCH_LEVEL, &c->microcode, &dummy);
• arch/x86/kernel/cpu/centaur.c:32:4-32:4: rdmsr(MSR_VIA_FCR, lo, hi);
• arch/x86/kernel/cpu/centaur.c:40:4-40:4: rdmsr(MSR_VIA_RNG, lo, hi);
• arch/x86/kernel/cpu/feat_ctl.c:39:2-39:2: rdmsr(MSR_IA32_VMX_PROCBASED_CTLS, ign, supported);
• arch/x86/kernel/cpu/feat_ctl.c:45:2-45:2: rdmsr(MSR_IA32_VMX_PINBASED_CTLS, ign, supported);
• arch/x86/kernel/cpu/feat_ctl.c:42:2-42:2: rdmsr_safe(MSR_IA32_VMX_PROCBASED_CTLS2, &ign, &supported);
• arch/x86/kernel/cpu/feat_ctl.c:46:2-46:2: rdmsr_safe(MSR_IA32_VMX_VMFUNC, &ign, &funcs);
• arch/x86/kernel/cpu/feat_ctl.c:52:2-52:2: rdmsr_safe(MSR_IA32_VMX_EPT_VPID_CAP, &ept, &vpid);
• arch/x86/kernel/cpu/hygon.c:248:2-248:2: rdmsr_safe(MSR_AMD64_PATCH_LEVEL, &c->microcode, &dummy);
• arch/x86/kernel/cpu/intel.c:647:3-647:3: rdmsr(MSR_IA32_MISC_ENABLE, l1, l2);
• arch/x86/kernel/cpu/mce/amd.c:393:2-393:2: rdmsr(tr->b->address, lo, hi);
• arch/x86/kernel/cpu/mce/amd.c:222:6-222:6: if (rdmsr_safe(MSR_AMD64_SMCA_MCx_CONFIG(bank), &low, &high))
• arch/x86/kernel/cpu/mce/amd.c:228:6-228:6: if (rdmsr_safe(MSR_AMD64_SMCA_MCx_MISC(bank), &low, &high))
• arch/x86/kernel/cpu/mce/amd.c:244:7-244:7: if (!rdmsr_safe(smca_config, &low, &high)) {
• arch/x86/kernel/cpu/mce/amd.c:279:6-279:6: if (rdmsr_safe(MSR_AMD64_SMCA_MCx_IPID(bank), &low, &high)) {
• arch/x86/kernel/cpu/mce/amd.c:468:6-468:6: if (rdmsr_safe(MSR_CU_DEF_ERR, &low, &high))
• arch/x86/kernel/cpu/mce/amd.c:559:6-559:6: if (rdmsr_safe(MSR_CU_DEF_ERR, &smca_low, &smca_high))
• arch/x86/kernel/cpu/mce/amd.c:660:8-660:8: if (rdmsr_safe(address, &low, &high))
• arch/x86/kernel/cpu/mce/amd.c:1010:6-1010:6: if (rdmsr_safe(block->address, &low, &high))
• arch/x86/kernel/cpu/mce/amd.c:1241:6-1241:6: if (rdmsr_safe(address, &low, &high))
• arch/x86/kernel/cpu/mce/severity.c:303:6-303:6: if (rdmsr_safe(addr, &low, &high))
• arch/x86/kernel/cpu/microcode/amd.c:573:2-573:2: rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);
• arch/x86/kernel/cpu/microcode/amd.c:688:2-688:2: rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);
• arch/x86/kernel/cpu/microcode/intel.c:731:3-731:3: rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]);
• arch/x86/kernel/cpu/mtrr/cleanup.c:695:2-695:2: rdmsr(MSR_MTRRdefType, def, dummy);
• arch/x86/kernel/cpu/mtrr/cleanup.c:892:2-892:2: rdmsr(MSR_MTRRdefType, def, dummy);
• arch/x86/kernel/cpu/mtrr/cleanup.c:839:6-839:6: if (rdmsr_safe(MSR_AMD64_SYSCFG, &l, &h) < 0)
• arch/x86/kernel/cpu/mtrr/generic.c:56:2-56:2: rdmsr(MSR_AMD64_SYSCFG, lo, hi);
• arch/x86/kernel/cpu/mtrr/generic.c:317:2-317:2: rdmsr(MTRRphysBase_MSR(index), vr->base_lo, vr->base_hi);
• arch/x86/kernel/cpu/mtrr/generic.c:318:2-318:2: rdmsr(MTRRphysMask_MSR(index), vr->mask_lo, vr->mask_hi);
• arch/x86/kernel/cpu/mtrr/generic.c:342:2-342:2: rdmsr(MSR_MTRRfix64K_00000, p[0], p[1]);
• arch/x86/kernel/cpu/mtrr/generic.c:345:3-345:3: rdmsr(MSR_MTRRfix16K_80000 + i, p[2 + i * 2], p[3 + i * 2]);
• arch/x86/kernel/cpu/mtrr/generic.c:347:3-347:3: rdmsr(MSR_MTRRfix4K_C0000 + i, p[6 + i * 2], p[7 + i * 2]);
• arch/x86/kernel/cpu/mtrr/generic.c:470:2-470:2: rdmsr(MSR_MTRRcap, lo, dummy);
• arch/x86/kernel/cpu/mtrr/generic.c:478:2-478:2: rdmsr(MSR_MTRRdefType, lo, dummy);
• arch/x86/kernel/cpu/mtrr/generic.c:486:3-486:3: rdmsr(MSR_K8_TOP_MEM2, low, high);
• arch/x86/kernel/cpu/mtrr/generic.c:542:2-542:2: rdmsr(msr, lo, hi);
• arch/x86/kernel/cpu/mtrr/generic.c:591:2-591:2: rdmsr(MTRRphysMask_MSR(reg), mask_lo, mask_hi);
• arch/x86/kernel/cpu/mtrr/generic.c:601:2-601:2: rdmsr(MTRRphysBase_MSR(reg), base_lo, base_hi);
• arch/x86/kernel/cpu/mtrr/generic.c:662:2-662:2: rdmsr(MTRRphysBase_MSR(index), lo, hi);
• arch/x86/kernel/cpu/mtrr/generic.c:671:2-671:2: rdmsr(MTRRphysMask_MSR(index), lo, hi);
• arch/x86/kernel/cpu/mtrr/generic.c:766:2-766:2: rdmsr(MSR_MTRRdefType, deftype_lo, deftype_hi);
• arch/x86/kernel/cpu/mtrr/generic.c:904:2-904:2: rdmsr(MSR_MTRRcap, config, dummy);
• arch/x86/kernel/cpu/mtrr/mtrr.c:127:3-127:3: rdmsr(MSR_MTRRcap, config, dummy);
• arch/x86/kernel/cpu/resctrl/core.c:208:2-208:2: rdmsr(MSR_IA32_L3_CBM_BASE, l, h);
• arch/x86/kernel/cpu/zhaoxin.c:30:4-30:4: rdmsr(MSR_ZHAOXIN_FCR57, lo, hi);
• arch/x86/kernel/cpu/zhaoxin.c:39:4-39:4: rdmsr(MSR_ZHAOXIN_FCR57, lo, hi);
• arch/x86/kernel/process.c:866:2-866:2: rdmsr(MSR_K8_INT_PENDING_MSG, lo, hi);
• arch/x86/kernel/tsc_msr.c:181:3-181:3: rdmsr(MSR_PLATFORM_INFO, lo, hi);
• arch/x86/kernel/tsc_msr.c:184:3-184:3: rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
• arch/x86/kernel/tsc_msr.c:189:2-189:2: rdmsr(MSR_FSB_FREQ, lo, hi);
• arch/x86/kvm/vmx/nested.c:6369:2-6369:2: rdmsr(MSR_IA32_VMX_PINBASED_CTLS,
• arch/x86/kvm/vmx/nested.c:6384:2-6384:2: rdmsr(MSR_IA32_VMX_EXIT_CTLS,
• arch/x86/kvm/vmx/nested.c:6405:2-6405:2: rdmsr(MSR_IA32_VMX_ENTRY_CTLS,
• arch/x86/kvm/vmx/nested.c:6423:2-6423:2: rdmsr(MSR_IA32_VMX_PROCBASED_CTLS,
• arch/x86/kvm/vmx/nested.c:6462:3-6462:3: rdmsr(MSR_IA32_VMX_PROCBASED_CTLS2,
• arch/x86/kvm/vmx/nested.c:6545:2-6545:2: rdmsr(MSR_IA32_VMX_MISC,
• arch/x86/kvm/vmx/vmx.c:2467:2-2467:2: rdmsr(msr, vmx_msr_low, vmx_msr_high);
• arch/x86/kvm/vmx/vmx.c:2645:2-2645:2: rdmsr(MSR_IA32_VMX_BASIC, vmx_msr_low, vmx_msr_high);
• arch/x86/kvm/vmx/vmx.c:4147:2-4147:2: rdmsr(MSR_IA32_SYSENTER_CS, low32, high32);
• arch/x86/kvm/vmx/vmx.c:4153:3-4153:3: rdmsr(MSR_IA32_CR_PAT, low32, high32);
• arch/x86/kvm/vmx/vmx.c:2562:2-2562:2: rdmsr_safe(MSR_IA32_VMX_EPT_VPID_CAP,
• arch/x86/kvm/x86.c:5983:7-5983:7: if (rdmsr_safe(msrs_to_save_all[i], &dummy[0], &dummy[1]) < 0)
• arch/x86/lib/msr-smp.c:19:2-19:2: rdmsr(rv->msr_no, reg->l, reg->h);
• arch/x86/lib/msr-smp.c:158:16-158:16: rv->msr.err = rdmsr_safe(rv->msr.msr_no, &rv->msr.reg.l, &rv->msr.reg.h);
• arch/x86/pci/mmconfig-shared.c:200:6-200:6: if (rdmsr_safe(address, &low, &high))
• drivers/acpi/processor_perflib.c:266:3-266:3: rdmsr(MSR_AMD_PSTATE_DEF_BASE + index, lo, hi);
• drivers/acpi/processor_throttling.c:719:3-719:3: rdmsr_safe(MSR_IA32_THERM_CONTROL,
• drivers/char/hw_random/via-rng.c:153:2-153:2: rdmsr(MSR_VIA_RNG, lo, hi);
• drivers/char/hw_random/via-rng.c:177:2-177:2: rdmsr(MSR_VIA_RNG, lo, hi);
• drivers/cpufreq/acpi-cpufreq.c:250:2-250:2: rdmsr(MSR_IA32_PERF_CTL, val, dummy);
• drivers/cpufreq/acpi-cpufreq.c:258:2-258:2: rdmsr(MSR_IA32_PERF_CTL, lo, hi);
• drivers/cpufreq/acpi-cpufreq.c:267:2-267:2: rdmsr(MSR_AMD_PERF_CTL, val, dummy);
• drivers/cpufreq/powernow-k8.c:91:2-91:2: rdmsr(MSR_FIDVID_STATUS, lo, hi);
• drivers/cpufreq/powernow-k8.c:109:3-109:3: rdmsr(MSR_FIDVID_STATUS, lo, hi);
• drivers/cpufreq/powernow-k8.c:136:2-136:2: rdmsr(MSR_FIDVID_STATUS, lo, hi);
• drivers/cpufreq/powernow-k8.c:294:2-294:2: rdmsr(MSR_FIDVID_STATUS, lo, maxvid);
• drivers/cpufreq/speedstep-centrino.c:381:2-381:2: rdmsr(MSR_IA32_MISC_ENABLE, l, h);
• drivers/cpufreq/speedstep-centrino.c:389:3-389:3: rdmsr(MSR_IA32_MISC_ENABLE, l, h);
• drivers/cpufreq/speedstep-lib.c:75:2-75:2: rdmsr(MSR_IA32_EBL_CR_POWERON, msr_lo, msr_tmp);
• drivers/cpufreq/speedstep-lib.c:112:2-112:2: rdmsr(MSR_IA32_EBL_CR_POWERON, msr_lo, msr_tmp);
• drivers/cpufreq/speedstep-lib.c:135:2-135:2: rdmsr(MSR_FSB_FREQ, msr_lo, msr_tmp);
• drivers/cpufreq/speedstep-lib.c:160:2-160:2: rdmsr(MSR_IA32_EBL_CR_POWERON, msr_lo, msr_tmp);
• drivers/cpufreq/speedstep-lib.c:189:2-189:2: rdmsr(0x2c, msr_lo, msr_hi);
• drivers/cpufreq/speedstep-lib.c:345:3-345:3: rdmsr(MSR_IA32_EBL_CR_POWERON, msr_lo, msr_hi);
• drivers/cpufreq/speedstep-lib.c:358:3-358:3: rdmsr(MSR_IA32_PLATFORM_ID, msr_lo, msr_hi);
• drivers/edac/mce_amd.c:1076:8-1076:8: if (!rdmsr_safe(addr, &low, &high) &&
• drivers/gpio/gpio-cs5535.c:155:2-155:2: rdmsr(MSR_PIC_ZSEL_HIGH, lo, hi);
• drivers/hwmon/hwmon-vid.c:241:2-241:2: rdmsr(0x198, dummy, vid);
• drivers/hwmon/hwmon-vid.c:244:2-244:2: rdmsr(0x1154, brand, dummy);
• drivers/iommu/io-pgtable-arm-v7s.c:431:18-431:18: tblp = ptep - ARM_V7S_LVL_IDX(iova, lvl, cfg);
• drivers/iommu/io-pgtable-arm-v7s.c:484:10-484:10: ptep += ARM_V7S_LVL_IDX(iova, lvl, cfg);
• drivers/iommu/io-pgtable-arm-v7s.c:605:14-605:14: unmap_idx = ARM_V7S_LVL_IDX(iova, 2, cfg);
• drivers/iommu/io-pgtable-arm-v7s.c:647:8-647:8: idx = ARM_V7S_LVL_IDX(iova, lvl, &iop->cfg);
• drivers/iommu/io-pgtable-arm-v7s.c:733:11-733:11: ptep += ARM_V7S_LVL_IDX(iova, ++lvl, &data->iop.cfg);
• drivers/isdn/capi/capiutil.c:516:5-516:25: unsigned _l = cmsg->l;
• drivers/misc/cs5535-mfgpt.c:84:2-84:2: rdmsr(msr, value, dummy);
• drivers/misc/cs5535-mfgpt.c:115:2-115:2: rdmsr(MSR_PIC_ZSEL_LOW, zsel, dummy);
• drivers/misc/cs5535-mfgpt.c:129:2-129:2: rdmsr(MSR_PIC_IRQM_LPC, lpc, dummy);
• drivers/powercap/intel_rapl_common.c:836:2-836:2: rdmsr_safe(MSR_IA32_PACKAGE_THERM_INTERRUPT, &l, &h);
• drivers/powercap/intel_rapl_common.c:878:2-878:2: rdmsr_safe(MSR_IA32_PACKAGE_THERM_INTERRUPT, &l, &h);
• drivers/thermal/intel/int340x_thermal/processor_thermal_device.c:167:8-167:8: err = rdmsr_safe(MSR_IA32_TEMPERATURE_TARGET, &eax, &edx);
• drivers/thermal/intel/intel_soc_dts_iosf.c:54:8-54:8: err = rdmsr_safe(MSR_IA32_TEMPERATURE_TARGET, &eax, &edx);
• drivers/thermal/intel/therm_throt.c:649:2-649:2: rdmsr(MSR_IA32_MISC_ENABLE, l, h);
• drivers/thermal/intel/therm_throt.c:675:4-675:4: rdmsr(MSR_THERM2_CTL, l, h);
• drivers/thermal/intel/therm_throt.c:686:2-686:2: rdmsr(MSR_IA32_THERM_INTERRUPT, l, h);
• drivers/thermal/intel/therm_throt.c:700:3-700:3: rdmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT, l, h);
• drivers/thermal/intel/therm_throt.c:717:2-717:2: rdmsr(MSR_IA32_MISC_ENABLE, l, h);
• drivers/thermal/intel/x86_pkg_temp_thermal.c:241:2-241:2: rdmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT, l, h);
• drivers/thermal/intel/x86_pkg_temp_thermal.c:257:2-257:2: rdmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT, l, h);
• drivers/thermal/intel/x86_pkg_temp_thermal.c:375:2-375:2: rdmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT, zonedev->msr_pkg_therm_low,
• drivers/video/fbdev/geode/display_gx.c:28:3-28:3: rdmsr(MSR_GLIU_P2D_RO0, lo, hi);
• drivers/video/fbdev/geode/lxfb_ops.c:129:2-129:2: rdmsr(MSR_GLCP_DOTPLL, dotpll_lo, dotpll_hi);
• drivers/video/fbdev/geode/lxfb_ops.c:147:3-147:3: rdmsr(MSR_GLCP_DOTPLL, dotpll_lo, dotpll_hi);
• drivers/video/fbdev/geode/lxfb_ops.c:318:3-318:3: rdmsr(MSR_GLIU_P2D_RO0, lo, hi);
• include/linux/cs5535.h:54:2-54:2: rdmsr(MSR_PIC_ZSEL_HIGH, lo, hi);
• net/rxrpc/key.c:652:2-652:2: ENCODE_DATA(cnlen, key->description + 4); /* cellname */
• net/rxrpc/key.c:673:5-673:5: ENCODE_DATA(token->kad->ticket_len, token->kad->ticket);
• net/rxrpc/key.c:666:4-666:4: ENCODE_BYTES(8, token->kad->session_key);
• net/tipc/node.c:978:2-978:24: struct tipc_link *l, *_l, *tnl;