# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/spi/omap-spi.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: SPI Controller on OMAP and K3 SoCs maintainers: - Aswath Govindraju <a-govindraju@ti.com> allOf: - $ref: spi-controller.yaml# properties: compatible: oneOf: - items: - enum: - ti,am654-mcspi - ti,am4372-mcspi - const: ti,omap4-mcspi - items: - enum: - ti,omap2-mcspi - ti,omap4-mcspi reg: maxItems: 1 interrupts: maxItems: 1 clocks: maxItems: 1 power-domains: maxItems: 1 ti,spi-num-cs: $ref: /schemas/types.yaml#/definitions/uint32 description: Number of chipselect supported by the instance. minimum: 1 maximum: 4 ti,hwmods: $ref: /schemas/types.yaml#/definitions/string description: Must be "mcspi<n>", n being the instance number (1-based). This property is applicable only on legacy platforms mainly omap2/3 and ti81xx and should not be used on other platforms. deprecated: true ti,pindir-d0-out-d1-in: description: Select the D0 pin as output and D1 as input. The default is D0 as input and D1 as output. type: boolean dmas: description: List of DMA specifiers with the controller specific format as described in the generic DMA client binding. A tx and rx specifier is required for each chip select. minItems: 1 maxItems: 8 dma-names: description: List of DMA request names. These strings correspond 1:1 with the DMA specifiers listed in dmas. The string names is to be "rxN" and "txN" for RX and TX requests, respectively. Where N is the chip select number. minItems: 1 maxItems: 8 required: - compatible - reg - interrupts unevaluatedProperties: false if: properties: compatible: enum: - ti,omap2-mcspi - ti,omap4-mcspi then: properties: ti,hwmods: items: - pattern: "^mcspi([1-9])$" else: properties: ti,hwmods: false examples: - | #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/soc/ti,sci_pm_domain.h> spi@2100000 { compatible = "ti,am654-mcspi","ti,omap4-mcspi"; reg = <0x2100000 0x400>; interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; clocks = <&k3_clks 137 1>; power-domains = <&k3_pds 137 TI_SCI_PD_EXCLUSIVE>; #address-cells = <1>; #size-cells = <0>; dmas = <&main_udmap 0xc500>, <&main_udmap 0x4500>; dma-names = "tx0", "rx0"; };