# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause %YAML 1.2 --- $id: http://devicetree.org/schemas/spi/atmel,quadspi.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Atmel Quad Serial Peripheral Interface (QSPI) maintainers: - Tudor Ambarus <tudor.ambarus@linaro.org> allOf: - $ref: spi-controller.yaml# properties: compatible: enum: - atmel,sama5d2-qspi - microchip,sam9x60-qspi - microchip,sama7g5-qspi - microchip,sama7g5-ospi reg: items: - description: base registers - description: mapped memory reg-names: items: - const: qspi_base - const: qspi_mmap clocks: minItems: 1 items: - description: peripheral clock - description: system clock or generic clock, if available clock-names: minItems: 1 items: - const: pclk - enum: [ qspick, gclk ] interrupts: maxItems: 1 dmas: items: - description: tx DMA channel - description: rx DMA channel dma-names: items: - const: tx - const: rx '#address-cells': const: 1 '#size-cells': const: 0 required: - compatible - reg - reg-names - interrupts - clocks - clock-names - '#address-cells' - '#size-cells' unevaluatedProperties: false examples: - | #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/clock/at91.h> spi@f0020000 { compatible = "atmel,sama5d2-qspi"; reg = <0xf0020000 0x100>, <0xd0000000 0x8000000>; reg-names = "qspi_base", "qspi_mmap"; interrupts = <52 IRQ_TYPE_LEVEL_HIGH 7>; clocks = <&pmc PMC_TYPE_PERIPHERAL 52>; clock-names = "pclk"; #address-cells = <1>; #size-cells = <0>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_spi0_default>; flash@0 { compatible = "jedec,spi-nor"; spi-max-frequency = <50000000>; reg = <0>; spi-rx-bus-width = <4>; spi-tx-bus-width = <4>; }; };