// SPDX-License-Identifier: GPL-2.0-or-later OR MIT /* * Copyright 2021 * Lukasz Majewski, DENX Software Engineering, lukma@denx.de */ /dts-v1/; #include "imx28-lwe.dtsi" / { compatible = "lwn,imx28-xea", "fsl,imx28"; }; &can0 { pinctrl-names = "default"; pinctrl-0 = <&can1_pins_a>; status = "okay"; }; &i2c1 { pinctrl-names = "default"; pinctrl-0 = <&i2c1_pins_b>; status = "okay"; }; &pinctrl { pinctrl-names = "default"; pinctrl-0 = <&hog_pins_a &hog_pins_tiva>; hog_pins_a: hog@0 { reg = <0>; fsl,pinmux-ids = < MX28_PAD_GPMI_D00__GPIO_0_0 MX28_PAD_GPMI_D02__GPIO_0_2 MX28_PAD_GPMI_D05__GPIO_0_5 MX28_PAD_GPMI_CE1N__GPIO_0_17 MX28_PAD_GPMI_RDY0__GPIO_0_20 MX28_PAD_GPMI_RDY1__GPIO_0_21 MX28_PAD_GPMI_RDY2__GPIO_0_22 MX28_PAD_GPMI_RDN__GPIO_0_24 MX28_PAD_GPMI_CLE__GPIO_0_27 MX28_PAD_LCD_VSYNC__GPIO_1_28 MX28_PAD_SSP1_SCK__GPIO_2_12 MX28_PAD_SSP1_CMD__GPIO_2_13 MX28_PAD_SSP2_SS1__GPIO_2_20 MX28_PAD_SSP2_SS2__GPIO_2_21 MX28_PAD_LCD_D00__GPIO_1_0 MX28_PAD_LCD_D01__GPIO_1_1 MX28_PAD_LCD_D02__GPIO_1_2 MX28_PAD_LCD_D03__GPIO_1_3 MX28_PAD_LCD_D04__GPIO_1_4 MX28_PAD_LCD_D05__GPIO_1_5 MX28_PAD_LCD_D06__GPIO_1_6 >; fsl,drive-strength = <MXS_DRIVE_4mA>; fsl,voltage = <MXS_VOLTAGE_HIGH>; fsl,pull-up = <MXS_PULL_DISABLE>; }; hog_pins_tiva: hog@1 { reg = <1>; fsl,pinmux-ids = < MX28_PAD_GPMI_RDY3__GPIO_0_23 MX28_PAD_GPMI_WRN__GPIO_0_25 >; fsl,voltage = <MXS_VOLTAGE_HIGH>; fsl,pull-up = <MXS_PULL_DISABLE>; }; hog_pins_coding: hog@2 { reg = <2>; fsl,pinmux-ids = < MX28_PAD_GPMI_D01__GPIO_0_1 MX28_PAD_GPMI_D03__GPIO_0_3 MX28_PAD_GPMI_D04__GPIO_0_4 MX28_PAD_GPMI_D06__GPIO_0_6 MX28_PAD_GPMI_D07__GPIO_0_7 >; fsl,voltage = <MXS_VOLTAGE_HIGH>; fsl,pull-up = <MXS_PULL_DISABLE>; }; }; ®_fec_3v3 { gpio = <&gpio0 0 0>; }; ®_usb_5v { gpio = <&gpio0 2 0>; }; &spi2_pins_a { fsl,pinmux-ids = < MX28_PAD_SSP2_SCK__SSP2_SCK MX28_PAD_SSP2_MOSI__SSP2_CMD MX28_PAD_SSP2_MISO__SSP2_D0 MX28_PAD_SSP2_SS0__GPIO_2_19 >; };