// SPDX-License-Identifier: GPL-2.0-or-later /* * Copyright 2013 Eukréa Electromatique <denis@eukrea.com> */ #include "imx35.dtsi" / { model = "Eukrea CPUIMX35"; compatible = "eukrea,cpuimx35", "fsl,imx35"; memory@80000000 { device_type = "memory"; reg = <0x80000000 0x8000000>; /* 128M */ }; }; &fec { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_fec>; status = "okay"; }; &i2c1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c1>; status = "okay"; pcf8563@51 { compatible = "nxp,pcf8563"; reg = <0x51>; }; tsc2007: tsc2007@48 { compatible = "ti,tsc2007"; gpios = <&gpio3 2 0>; interrupt-parent = <&gpio3>; interrupts = <0x2 0x8>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_tsc2007_1>; reg = <0x48>; ti,x-plate-ohms = <180>; }; }; &iomuxc { imx35-eukrea { pinctrl_fec: fecgrp { fsl,pins = < MX35_PAD_FEC_TX_CLK__FEC_TX_CLK 0x80000000 MX35_PAD_FEC_RX_CLK__FEC_RX_CLK 0x80000000 MX35_PAD_FEC_RX_DV__FEC_RX_DV 0x80000000 MX35_PAD_FEC_COL__FEC_COL 0x80000000 MX35_PAD_FEC_RDATA0__FEC_RDATA_0 0x80000000 MX35_PAD_FEC_TDATA0__FEC_TDATA_0 0x80000000 MX35_PAD_FEC_TX_EN__FEC_TX_EN 0x80000000 MX35_PAD_FEC_MDC__FEC_MDC 0x80000000 MX35_PAD_FEC_MDIO__FEC_MDIO 0x80000000 MX35_PAD_FEC_TX_ERR__FEC_TX_ERR 0x80000000 MX35_PAD_FEC_RX_ERR__FEC_RX_ERR 0x80000000 MX35_PAD_FEC_CRS__FEC_CRS 0x80000000 MX35_PAD_FEC_RDATA1__FEC_RDATA_1 0x80000000 MX35_PAD_FEC_TDATA1__FEC_TDATA_1 0x80000000 MX35_PAD_FEC_RDATA2__FEC_RDATA_2 0x80000000 MX35_PAD_FEC_TDATA2__FEC_TDATA_2 0x80000000 MX35_PAD_FEC_RDATA3__FEC_RDATA_3 0x80000000 MX35_PAD_FEC_TDATA3__FEC_TDATA_3 0x80000000 >; }; pinctrl_i2c1: i2c1grp { fsl,pins = < MX35_PAD_I2C1_CLK__I2C1_SCL 0x80000000 MX35_PAD_I2C1_DAT__I2C1_SDA 0x80000000 >; }; pinctrl_tsc2007_1: tsc2007grp-1 { fsl,pins = <MX35_PAD_ATA_DA2__GPIO3_2 0x80000000>; }; }; }; &nfc { nand-bus-width = <8>; nand-ecc-mode = "hw"; nand-on-flash-bbt; status = "okay"; };