# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/spi/mediatek,spi-mt65xx.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: SPI Bus controller for MediaTek ARM SoCs maintainers: - Leilk Liu <leilk.liu@mediatek.com> allOf: - $ref: /schemas/spi/spi-controller.yaml# properties: compatible: oneOf: - items: - enum: - mediatek,mt7629-spi - mediatek,mt8365-spi - const: mediatek,mt7622-spi - items: - enum: - mediatek,mt8516-spi - const: mediatek,mt2712-spi - items: - enum: - mediatek,mt6779-spi - mediatek,mt8186-spi - mediatek,mt8192-spi - mediatek,mt8195-spi - const: mediatek,mt6765-spi - items: - enum: - mediatek,mt7986-spi-ipm - mediatek,mt8188-spi-ipm - const: mediatek,spi-ipm - items: - enum: - mediatek,mt2701-spi - mediatek,mt2712-spi - mediatek,mt6589-spi - mediatek,mt6765-spi - mediatek,mt6893-spi - mediatek,mt7622-spi - mediatek,mt8135-spi - mediatek,mt8173-spi - mediatek,mt8183-spi reg: maxItems: 1 interrupts: maxItems: 1 clocks: minItems: 3 items: - description: clock used for the parent clock - description: clock used for the muxes clock - description: clock used for the clock gate - description: clock used for the AHB bus, this clock is optional clock-names: minItems: 3 items: - const: parent-clk - const: sel-clk - const: spi-clk - const: hclk mediatek,pad-select: $ref: /schemas/types.yaml#/definitions/uint32-array minItems: 1 maxItems: 4 items: enum: [0, 1, 2, 3] description: specify which pins group(ck/mi/mo/cs) spi controller used. This is an array. required: - compatible - reg - interrupts - clocks - clock-names - '#address-cells' - '#size-cells' unevaluatedProperties: false examples: - | #include <dt-bindings/clock/mt8173-clk.h> #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/irq.h> spi@1100a000 { compatible = "mediatek,mt8173-spi"; #address-cells = <1>; #size-cells = <0>; reg = <0x1100a000 0x1000>; interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_LOW>; clocks = <&topckgen CLK_TOP_SYSPLL3_D2>, <&topckgen CLK_TOP_SPI_SEL>, <&pericfg CLK_PERI_SPI0>; clock-names = "parent-clk", "sel-clk", "spi-clk"; cs-gpios = <&pio 105 GPIO_ACTIVE_LOW>, <&pio 72 GPIO_ACTIVE_LOW>; mediatek,pad-select = <1>, <0>; };