# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause %YAML 1.2 --- $id: http://devicetree.org/schemas/display/msm/qcom,msm8998-dpu.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm Display DPU on MSM8998 maintainers: - AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> $ref: /schemas/display/msm/dpu-common.yaml# properties: compatible: const: qcom,msm8998-dpu reg: items: - description: Address offset and size for mdp register set - description: Address offset and size for regdma register set - description: Address offset and size for vbif register set - description: Address offset and size for non-realtime vbif register set reg-names: items: - const: mdp - const: regdma - const: vbif - const: vbif_nrt clocks: items: - description: Display ahb clock - description: Display axi clock - description: Display mem-noc clock - description: Display core clock - description: Display vsync clock clock-names: items: - const: iface - const: bus - const: mnoc - const: core - const: vsync required: - compatible - reg - reg-names - clocks - clock-names unevaluatedProperties: false examples: - | #include <dt-bindings/clock/qcom,mmcc-msm8998.h> #include <dt-bindings/power/qcom-rpmpd.h> display-controller@c901000 { compatible = "qcom,msm8998-dpu"; reg = <0x0c901000 0x8f000>, <0x0c9a8e00 0xf0>, <0x0c9b0000 0x2008>, <0x0c9b8000 0x1040>; reg-names = "mdp", "regdma", "vbif", "vbif_nrt"; clocks = <&mmcc MDSS_AHB_CLK>, <&mmcc MDSS_AXI_CLK>, <&mmcc MNOC_AHB_CLK>, <&mmcc MDSS_MDP_CLK>, <&mmcc MDSS_VSYNC_CLK>; clock-names = "iface", "bus", "mnoc", "core", "vsync"; interrupt-parent = <&mdss>; interrupts = <0>; operating-points-v2 = <&mdp_opp_table>; power-domains = <&rpmpd MSM8998_VDDMX>; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; endpoint { remote-endpoint = <&dsi0_in>; }; }; port@1 { reg = <1>; endpoint { remote-endpoint = <&dsi1_in>; }; }; }; }; ...