#ifndef ASIC_REG_TPC5_RTR_REGS_H_
#define ASIC_REG_TPC5_RTR_REGS_H_
#define mmTPC5_RTR_HBW_RD_RQ_E_ARB 0xF40100
#define mmTPC5_RTR_HBW_RD_RQ_W_ARB 0xF40104
#define mmTPC5_RTR_HBW_RD_RQ_N_ARB 0xF40108
#define mmTPC5_RTR_HBW_RD_RQ_S_ARB 0xF4010C
#define mmTPC5_RTR_HBW_RD_RQ_L_ARB 0xF40110
#define mmTPC5_RTR_HBW_E_ARB_MAX 0xF40120
#define mmTPC5_RTR_HBW_W_ARB_MAX 0xF40124
#define mmTPC5_RTR_HBW_N_ARB_MAX 0xF40128
#define mmTPC5_RTR_HBW_S_ARB_MAX 0xF4012C
#define mmTPC5_RTR_HBW_L_ARB_MAX 0xF40130
#define mmTPC5_RTR_HBW_RD_RS_E_ARB 0xF40140
#define mmTPC5_RTR_HBW_RD_RS_W_ARB 0xF40144
#define mmTPC5_RTR_HBW_RD_RS_N_ARB 0xF40148
#define mmTPC5_RTR_HBW_RD_RS_S_ARB 0xF4014C
#define mmTPC5_RTR_HBW_RD_RS_L_ARB 0xF40150
#define mmTPC5_RTR_HBW_WR_RQ_E_ARB 0xF40170
#define mmTPC5_RTR_HBW_WR_RQ_W_ARB 0xF40174
#define mmTPC5_RTR_HBW_WR_RQ_N_ARB 0xF40178
#define mmTPC5_RTR_HBW_WR_RQ_S_ARB 0xF4017C
#define mmTPC5_RTR_HBW_WR_RQ_L_ARB 0xF40180
#define mmTPC5_RTR_HBW_WR_RS_E_ARB 0xF40190
#define mmTPC5_RTR_HBW_WR_RS_W_ARB 0xF40194
#define mmTPC5_RTR_HBW_WR_RS_N_ARB 0xF40198
#define mmTPC5_RTR_HBW_WR_RS_S_ARB 0xF4019C
#define mmTPC5_RTR_HBW_WR_RS_L_ARB 0xF401A0
#define mmTPC5_RTR_LBW_RD_RQ_E_ARB 0xF40200
#define mmTPC5_RTR_LBW_RD_RQ_W_ARB 0xF40204
#define mmTPC5_RTR_LBW_RD_RQ_N_ARB 0xF40208
#define mmTPC5_RTR_LBW_RD_RQ_S_ARB 0xF4020C
#define mmTPC5_RTR_LBW_RD_RQ_L_ARB 0xF40210
#define mmTPC5_RTR_LBW_E_ARB_MAX 0xF40220
#define mmTPC5_RTR_LBW_W_ARB_MAX 0xF40224
#define mmTPC5_RTR_LBW_N_ARB_MAX 0xF40228
#define mmTPC5_RTR_LBW_S_ARB_MAX 0xF4022C
#define mmTPC5_RTR_LBW_L_ARB_MAX 0xF40230
#define mmTPC5_RTR_LBW_RD_RS_E_ARB 0xF40250
#define mmTPC5_RTR_LBW_RD_RS_W_ARB 0xF40254
#define mmTPC5_RTR_LBW_RD_RS_N_ARB 0xF40258
#define mmTPC5_RTR_LBW_RD_RS_S_ARB 0xF4025C
#define mmTPC5_RTR_LBW_RD_RS_L_ARB 0xF40260
#define mmTPC5_RTR_LBW_WR_RQ_E_ARB 0xF40270
#define mmTPC5_RTR_LBW_WR_RQ_W_ARB 0xF40274
#define mmTPC5_RTR_LBW_WR_RQ_N_ARB 0xF40278
#define mmTPC5_RTR_LBW_WR_RQ_S_ARB 0xF4027C
#define mmTPC5_RTR_LBW_WR_RQ_L_ARB 0xF40280
#define mmTPC5_RTR_LBW_WR_RS_E_ARB 0xF40290
#define mmTPC5_RTR_LBW_WR_RS_W_ARB 0xF40294
#define mmTPC5_RTR_LBW_WR_RS_N_ARB 0xF40298
#define mmTPC5_RTR_LBW_WR_RS_S_ARB 0xF4029C
#define mmTPC5_RTR_LBW_WR_RS_L_ARB 0xF402A0
#define mmTPC5_RTR_DBG_E_ARB 0xF40300
#define mmTPC5_RTR_DBG_W_ARB 0xF40304
#define mmTPC5_RTR_DBG_N_ARB 0xF40308
#define mmTPC5_RTR_DBG_S_ARB 0xF4030C
#define mmTPC5_RTR_DBG_L_ARB 0xF40310
#define mmTPC5_RTR_DBG_E_ARB_MAX 0xF40320
#define mmTPC5_RTR_DBG_W_ARB_MAX 0xF40324
#define mmTPC5_RTR_DBG_N_ARB_MAX 0xF40328
#define mmTPC5_RTR_DBG_S_ARB_MAX 0xF4032C
#define mmTPC5_RTR_DBG_L_ARB_MAX 0xF40330
#define mmTPC5_RTR_SPLIT_COEF_0 0xF40400
#define mmTPC5_RTR_SPLIT_COEF_1 0xF40404
#define mmTPC5_RTR_SPLIT_COEF_2 0xF40408
#define mmTPC5_RTR_SPLIT_COEF_3 0xF4040C
#define mmTPC5_RTR_SPLIT_COEF_4 0xF40410
#define mmTPC5_RTR_SPLIT_COEF_5 0xF40414
#define mmTPC5_RTR_SPLIT_COEF_6 0xF40418
#define mmTPC5_RTR_SPLIT_COEF_7 0xF4041C
#define mmTPC5_RTR_SPLIT_COEF_8 0xF40420
#define mmTPC5_RTR_SPLIT_COEF_9 0xF40424
#define mmTPC5_RTR_SPLIT_CFG 0xF40440
#define mmTPC5_RTR_SPLIT_RD_SAT 0xF40444
#define mmTPC5_RTR_SPLIT_RD_RST_TOKEN 0xF40448
#define mmTPC5_RTR_SPLIT_RD_TIMEOUT_0 0xF4044C
#define mmTPC5_RTR_SPLIT_RD_TIMEOUT_1 0xF40450
#define mmTPC5_RTR_SPLIT_WR_SAT 0xF40454
#define mmTPC5_RTR_WPLIT_WR_TST_TOLEN 0xF40458
#define mmTPC5_RTR_SPLIT_WR_TIMEOUT_0 0xF4045C
#define mmTPC5_RTR_SPLIT_WR_TIMEOUT_1 0xF40460
#define mmTPC5_RTR_HBW_RANGE_HIT 0xF40470
#define mmTPC5_RTR_HBW_RANGE_MASK_L_0 0xF40480
#define mmTPC5_RTR_HBW_RANGE_MASK_L_1 0xF40484
#define mmTPC5_RTR_HBW_RANGE_MASK_L_2 0xF40488
#define mmTPC5_RTR_HBW_RANGE_MASK_L_3 0xF4048C
#define mmTPC5_RTR_HBW_RANGE_MASK_L_4 0xF40490
#define mmTPC5_RTR_HBW_RANGE_MASK_L_5 0xF40494
#define mmTPC5_RTR_HBW_RANGE_MASK_L_6 0xF40498
#define mmTPC5_RTR_HBW_RANGE_MASK_L_7 0xF4049C
#define mmTPC5_RTR_HBW_RANGE_MASK_H_0 0xF404A0
#define mmTPC5_RTR_HBW_RANGE_MASK_H_1 0xF404A4
#define mmTPC5_RTR_HBW_RANGE_MASK_H_2 0xF404A8
#define mmTPC5_RTR_HBW_RANGE_MASK_H_3 0xF404AC
#define mmTPC5_RTR_HBW_RANGE_MASK_H_4 0xF404B0
#define mmTPC5_RTR_HBW_RANGE_MASK_H_5 0xF404B4
#define mmTPC5_RTR_HBW_RANGE_MASK_H_6 0xF404B8
#define mmTPC5_RTR_HBW_RANGE_MASK_H_7 0xF404BC
#define mmTPC5_RTR_HBW_RANGE_BASE_L_0 0xF404C0
#define mmTPC5_RTR_HBW_RANGE_BASE_L_1 0xF404C4
#define mmTPC5_RTR_HBW_RANGE_BASE_L_2 0xF404C8
#define mmTPC5_RTR_HBW_RANGE_BASE_L_3 0xF404CC
#define mmTPC5_RTR_HBW_RANGE_BASE_L_4 0xF404D0
#define mmTPC5_RTR_HBW_RANGE_BASE_L_5 0xF404D4
#define mmTPC5_RTR_HBW_RANGE_BASE_L_6 0xF404D8
#define mmTPC5_RTR_HBW_RANGE_BASE_L_7 0xF404DC
#define mmTPC5_RTR_HBW_RANGE_BASE_H_0 0xF404E0
#define mmTPC5_RTR_HBW_RANGE_BASE_H_1 0xF404E4
#define mmTPC5_RTR_HBW_RANGE_BASE_H_2 0xF404E8
#define mmTPC5_RTR_HBW_RANGE_BASE_H_3 0xF404EC
#define mmTPC5_RTR_HBW_RANGE_BASE_H_4 0xF404F0
#define mmTPC5_RTR_HBW_RANGE_BASE_H_5 0xF404F4
#define mmTPC5_RTR_HBW_RANGE_BASE_H_6 0xF404F8
#define mmTPC5_RTR_HBW_RANGE_BASE_H_7 0xF404FC
#define mmTPC5_RTR_LBW_RANGE_HIT 0xF40500
#define mmTPC5_RTR_LBW_RANGE_MASK_0 0xF40510
#define mmTPC5_RTR_LBW_RANGE_MASK_1 0xF40514
#define mmTPC5_RTR_LBW_RANGE_MASK_2 0xF40518
#define mmTPC5_RTR_LBW_RANGE_MASK_3 0xF4051C
#define mmTPC5_RTR_LBW_RANGE_MASK_4 0xF40520
#define mmTPC5_RTR_LBW_RANGE_MASK_5 0xF40524
#define mmTPC5_RTR_LBW_RANGE_MASK_6 0xF40528
#define mmTPC5_RTR_LBW_RANGE_MASK_7 0xF4052C
#define mmTPC5_RTR_LBW_RANGE_MASK_8 0xF40530
#define mmTPC5_RTR_LBW_RANGE_MASK_9 0xF40534
#define mmTPC5_RTR_LBW_RANGE_MASK_10 0xF40538
#define mmTPC5_RTR_LBW_RANGE_MASK_11 0xF4053C
#define mmTPC5_RTR_LBW_RANGE_MASK_12 0xF40540
#define mmTPC5_RTR_LBW_RANGE_MASK_13 0xF40544
#define mmTPC5_RTR_LBW_RANGE_MASK_14 0xF40548
#define mmTPC5_RTR_LBW_RANGE_MASK_15 0xF4054C
#define mmTPC5_RTR_LBW_RANGE_BASE_0 0xF40550
#define mmTPC5_RTR_LBW_RANGE_BASE_1 0xF40554
#define mmTPC5_RTR_LBW_RANGE_BASE_2 0xF40558
#define mmTPC5_RTR_LBW_RANGE_BASE_3 0xF4055C
#define mmTPC5_RTR_LBW_RANGE_BASE_4 0xF40560
#define mmTPC5_RTR_LBW_RANGE_BASE_5 0xF40564
#define mmTPC5_RTR_LBW_RANGE_BASE_6 0xF40568
#define mmTPC5_RTR_LBW_RANGE_BASE_7 0xF4056C
#define mmTPC5_RTR_LBW_RANGE_BASE_8 0xF40570
#define mmTPC5_RTR_LBW_RANGE_BASE_9 0xF40574
#define mmTPC5_RTR_LBW_RANGE_BASE_10 0xF40578
#define mmTPC5_RTR_LBW_RANGE_BASE_11 0xF4057C
#define mmTPC5_RTR_LBW_RANGE_BASE_12 0xF40580
#define mmTPC5_RTR_LBW_RANGE_BASE_13 0xF40584
#define mmTPC5_RTR_LBW_RANGE_BASE_14 0xF40588
#define mmTPC5_RTR_LBW_RANGE_BASE_15 0xF4058C
#define mmTPC5_RTR_RGLTR 0xF40590
#define mmTPC5_RTR_RGLTR_WR_RESULT 0xF40594
#define mmTPC5_RTR_RGLTR_RD_RESULT 0xF40598
#define mmTPC5_RTR_SCRAMB_EN 0xF40600
#define mmTPC5_RTR_NON_LIN_SCRAMB 0xF40604
#endif /* ASIC_REG_TPC5_RTR_REGS_H_ */