# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/net/can/st,stm32-bxcan.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: STMicroelectronics bxCAN controller description: STMicroelectronics BxCAN controller for CAN bus maintainers: - Dario Binacchi <dario.binacchi@amarulasolutions.com> allOf: - $ref: can-controller.yaml# properties: compatible: enum: - st,stm32f4-bxcan st,can-primary: description: Primary mode of the bxCAN peripheral is only relevant if the chip has two CAN peripherals in dual CAN configuration. In that case they share some of the required logic. Not to be used if the peripheral is in single CAN configuration. To avoid misunderstandings, it should be noted that ST documentation uses the terms master instead of primary. type: boolean st,can-secondary: description: Secondary mode of the bxCAN peripheral is only relevant if the chip has two CAN peripherals in dual CAN configuration. In that case they share some of the required logic. Not to be used if the peripheral is in single CAN configuration. To avoid misunderstandings, it should be noted that ST documentation uses the terms slave instead of secondary. type: boolean reg: maxItems: 1 interrupts: items: - description: transmit interrupt - description: FIFO 0 receive interrupt - description: FIFO 1 receive interrupt - description: status change error interrupt interrupt-names: items: - const: tx - const: rx0 - const: rx1 - const: sce resets: maxItems: 1 clocks: maxItems: 1 st,gcan: $ref: /schemas/types.yaml#/definitions/phandle-array description: The phandle to the gcan node which allows to access the 512-bytes SRAM memory shared by the two bxCAN cells (CAN1 primary and CAN2 secondary) in dual CAN peripheral configuration. required: - compatible - reg - interrupts - resets - clocks - st,gcan additionalProperties: false examples: - | #include <dt-bindings/clock/stm32fx-clock.h> #include <dt-bindings/mfd/stm32f4-rcc.h> can1: can@40006400 { compatible = "st,stm32f4-bxcan"; reg = <0x40006400 0x200>; interrupts = <19>, <20>, <21>, <22>; interrupt-names = "tx", "rx0", "rx1", "sce"; resets = <&rcc STM32F4_APB1_RESET(CAN1)>; clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN1)>; st,can-primary; st,gcan = <&gcan>; };