// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (c) 2021 BayLibre, SAS.
* Author: Fabien Parent <fparent@baylibre.com>
*/
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "mt8183.dtsi"
#include "mt6358.dtsi"
/ {
model = "Pumpkin MT8183";
compatible = "mediatek,mt8183-pumpkin", "mediatek,mt8183";
aliases {
serial0 = &uart0;
};
memory@40000000 {
device_type = "memory";
reg = <0 0x40000000 0 0x80000000>;
};
chosen {
stdout-path = "serial0:921600n8";
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
scp_mem_reserved: scp_mem_region@50000000 {
compatible = "shared-dma-pool";
reg = <0 0x50000000 0 0x2900000>;
no-map;
};
};
leds {
compatible = "gpio-leds";
led-red {
label = "red";
gpios = <&pio 155 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
led-green {
label = "green";
gpios = <&pio 156 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
};
thermistor {
compatible = "murata,ncp03wf104";
pullup-uv = <1800000>;
pullup-ohm = <390000>;
pulldown-ohm = <0>;
io-channels = <&auxadc 0>;
};
};
&auxadc {
status = "okay";
};
&gpu {
mali-supply = <&mt6358_vgpu_reg>;
};
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c_pins_0>;
status = "okay";
clock-frequency = <100000>;
};
&i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&i2c_pins_1>;
status = "okay";
clock-frequency = <100000>;
};
&i2c2 {
pinctrl-names = "default";
pinctrl-0 = <&i2c_pins_2>;
status = "okay";
clock-frequency = <100000>;
};
&i2c3 {
pinctrl-names = "default";
pinctrl-0 = <&i2c_pins_3>;
status = "okay";
clock-frequency = <100000>;
};
&i2c4 {
pinctrl-names = "default";
pinctrl-0 = <&i2c_pins_4>;
status = "okay";
clock-frequency = <100000>;
};
&i2c5 {
pinctrl-names = "default";
pinctrl-0 = <&i2c_pins_5>;
status = "okay";
clock-frequency = <100000>;
};
&i2c6 {
pinctrl-names = "default";
pinctrl-0 = <&i2c6_pins>;
status = "okay";
clock-frequency = <100000>;
};
&keyboard {
pinctrl-names = "default";
pinctrl-0 = <&keyboard_pins>;
status = "okay";
linux,keymap = <MATRIX_KEY(0x00, 0x00, KEY_VOLUMEDOWN)
MATRIX_KEY(0x01, 0x00, KEY_VOLUMEUP)>;
keypad,num-rows = <2>;
keypad,num-columns = <1>;
debounce-delay-ms = <32>;
mediatek,keys-per-group = <2>;
};
&mmc0 {
status = "okay";
pinctrl-names = "default", "state_uhs";
pinctrl-0 = <&mmc0_pins_default>;
pinctrl-1 = <&mmc0_pins_uhs>;
bus-width = <8>;
max-frequency = <200000000>;
cap-mmc-highspeed;
mmc-hs200-1_8v;
mmc-hs400-1_8v;
cap-mmc-hw-reset;
no-sdio;
no-sd;
hs400-ds-delay = <0x12814>;
vmmc-supply = <&mt6358_vemc_reg>;
vqmmc-supply = <&mt6358_vio18_reg>;
assigned-clocks = <&topckgen CLK_TOP_MUX_MSDC50_0>;
assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_CK>;
non-removable;
};
&mmc1 {
status = "okay";
pinctrl-names = "default", "state_uhs";
pinctrl-0 = <&mmc1_pins_default>;
pinctrl-1 = <&mmc1_pins_uhs>;
bus-width = <4>;
max-frequency = <200000000>;
cap-sd-highspeed;
sd-uhs-sdr50;
sd-uhs-sdr104;
cap-sdio-irq;
no-mmc;
no-sd;
vmmc-supply = <&mt6358_vmch_reg>;
vqmmc-supply = <&mt6358_vmc_reg>;
keep-power-in-suspend;
wakeup-source;
non-removable;
};
&mt6358_vgpu_reg {
regulator-min-microvolt = <625000>;
regulator-max-microvolt = <900000>;
regulator-coupled-with = <&mt6358_vsram_gpu_reg>;
regulator-coupled-max-spread = <100000>;
};
&mt6358_vsram_gpu_reg {
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <1000000>;
regulator-coupled-with = <&mt6358_vgpu_reg>;
regulator-coupled-max-spread = <100000>;
};
&pio {
i2c_pins_0: i2c0 {
pins_i2c{
pinmux = <PINMUX_GPIO82__FUNC_SDA0>,
<PINMUX_GPIO83__FUNC_SCL0>;
mediatek,pull-up-adv = <3>;
mediatek,drive-strength-adv = <00>;
};
};
i2c_pins_1: i2c1 {
pins_i2c{
pinmux = <PINMUX_GPIO81__FUNC_SDA1>,
<PINMUX_GPIO84__FUNC_SCL1>;
mediatek,pull-up-adv = <3>;
mediatek,drive-strength-adv = <00>;
};
};
i2c_pins_2: i2c2 {
pins_i2c{
pinmux = <PINMUX_GPIO103__FUNC_SCL2>,
<PINMUX_GPIO104__FUNC_SDA2>;
mediatek,pull-up-adv = <3>;
mediatek,drive-strength-adv = <00>;
};
};
i2c_pins_3: i2c3 {
pins_i2c{
pinmux = <PINMUX_GPIO50__FUNC_SCL3>,
<PINMUX_GPIO51__FUNC_SDA3>;
mediatek,pull-up-adv = <3>;
mediatek,drive-strength-adv = <00>;
};
};
i2c_pins_4: i2c4 {
pins_i2c{
pinmux = <PINMUX_GPIO105__FUNC_SCL4>,
<PINMUX_GPIO106__FUNC_SDA4>;
mediatek,pull-up-adv = <3>;
mediatek,drive-strength-adv = <00>;
};
};
i2c_pins_5: i2c5 {
pins_i2c{
pinmux = <PINMUX_GPIO48__FUNC_SCL5>,
<PINMUX_GPIO49__FUNC_SDA5>;
mediatek,pull-up-adv = <3>;
mediatek,drive-strength-adv = <00>;
};
};
i2c6_pins: i2c6 {
pins_cmd_dat {
pinmux = <PINMUX_GPIO113__FUNC_SCL6>,
<PINMUX_GPIO114__FUNC_SDA6>;
mediatek,pull-up-adv = <3>;
};
};
keyboard_pins: keyboard {
pins_keyboard {
pinmux = <PINMUX_GPIO91__FUNC_KPROW1>,
<PINMUX_GPIO92__FUNC_KPROW0>,
<PINMUX_GPIO93__FUNC_KPCOL0>;
};
};
mmc0_pins_default: mmc0-pins-default {
pins_cmd_dat {
pinmux = <PINMUX_GPIO123__FUNC_MSDC0_DAT0>,
<PINMUX_GPIO128__FUNC_MSDC0_DAT1>,
<PINMUX_GPIO125__FUNC_MSDC0_DAT2>,
<PINMUX_GPIO132__FUNC_MSDC0_DAT3>,
<PINMUX_GPIO126__FUNC_MSDC0_DAT4>,
<PINMUX_GPIO129__FUNC_MSDC0_DAT5>,
<PINMUX_GPIO127__FUNC_MSDC0_DAT6>,
<PINMUX_GPIO130__FUNC_MSDC0_DAT7>,
<PINMUX_GPIO122__FUNC_MSDC0_CMD>;
input-enable;
drive-strength = <MTK_DRIVE_14mA>;
mediatek,pull-up-adv = <01>;
};
pins_clk {
pinmux = <PINMUX_GPIO124__FUNC_MSDC0_CLK>;
drive-strength = <MTK_DRIVE_14mA>;
mediatek,pull-down-adv = <10>;
};
pins_rst {
pinmux = <PINMUX_GPIO133__FUNC_MSDC0_RSTB>;
drive-strength = <MTK_DRIVE_14mA>;
mediatek,pull-down-adv = <01>;
};
};
mmc0_pins_uhs: mmc0-pins-uhs {
pins_cmd_dat {
pinmux = <PINMUX_GPIO123__FUNC_MSDC0_DAT0>,
<PINMUX_GPIO128__FUNC_MSDC0_DAT1>,
<PINMUX_GPIO125__FUNC_MSDC0_DAT2>,
<PINMUX_GPIO132__FUNC_MSDC0_DAT3>,
<PINMUX_GPIO126__FUNC_MSDC0_DAT4>,
<PINMUX_GPIO129__FUNC_MSDC0_DAT5>,
<PINMUX_GPIO127__FUNC_MSDC0_DAT6>,
<PINMUX_GPIO130__FUNC_MSDC0_DAT7>,
<PINMUX_GPIO122__FUNC_MSDC0_CMD>;
input-enable;
drive-strength = <MTK_DRIVE_14mA>;
mediatek,pull-up-adv = <01>;
};
pins_clk {
pinmux = <PINMUX_GPIO124__FUNC_MSDC0_CLK>;
drive-strength = <MTK_DRIVE_14mA>;
mediatek,pull-down-adv = <10>;
};
pins_ds {
pinmux = <PINMUX_GPIO131__FUNC_MSDC0_DSL>;
drive-strength = <MTK_DRIVE_14mA>;
mediatek,pull-down-adv = <10>;
};
pins_rst {
pinmux = <PINMUX_GPIO133__FUNC_MSDC0_RSTB>;
drive-strength = <MTK_DRIVE_14mA>;
mediatek,pull-up-adv = <01>;
};
};
mmc1_pins_default: mmc1-pins-default {
pins_cmd_dat {
pinmux = <PINMUX_GPIO31__FUNC_MSDC1_CMD>,
<PINMUX_GPIO32__FUNC_MSDC1_DAT0>,
<PINMUX_GPIO34__FUNC_MSDC1_DAT1>,
<PINMUX_GPIO33__FUNC_MSDC1_DAT2>,
<PINMUX_GPIO30__FUNC_MSDC1_DAT3>;
input-enable;
mediatek,pull-up-adv = <10>;
};
pins_clk {
pinmux = <PINMUX_GPIO29__FUNC_MSDC1_CLK>;
input-enable;
mediatek,pull-down-adv = <10>;
};
pins_pmu {
pinmux = <PINMUX_GPIO178__FUNC_GPIO178>;
output-high;
};
};
mmc1_pins_uhs: mmc1-pins-uhs {
pins_cmd_dat {
pinmux = <PINMUX_GPIO31__FUNC_MSDC1_CMD>,
<PINMUX_GPIO32__FUNC_MSDC1_DAT0>,
<PINMUX_GPIO34__FUNC_MSDC1_DAT1>,
<PINMUX_GPIO33__FUNC_MSDC1_DAT2>,
<PINMUX_GPIO30__FUNC_MSDC1_DAT3>;
drive-strength = <MTK_DRIVE_6mA>;
input-enable;
mediatek,pull-up-adv = <10>;
};
pins_clk {
pinmux = <PINMUX_GPIO29__FUNC_MSDC1_CLK>;
drive-strength = <MTK_DRIVE_8mA>;
mediatek,pull-down-adv = <10>;
input-enable;
};
};
};
&mfg {
domain-supply = <&mt6358_vgpu_reg>;
};
&cpu0 {
proc-supply = <&mt6358_vproc12_reg>;
};
&cpu1 {
proc-supply = <&mt6358_vproc12_reg>;
};
&cpu2 {
proc-supply = <&mt6358_vproc12_reg>;
};
&cpu3 {
proc-supply = <&mt6358_vproc12_reg>;
};
&cpu4 {
proc-supply = <&mt6358_vproc11_reg>;
};
&cpu5 {
proc-supply = <&mt6358_vproc11_reg>;
};
&cpu6 {
proc-supply = <&mt6358_vproc11_reg>;
};
&cpu7 {
proc-supply = <&mt6358_vproc11_reg>;
};
&uart0 {
status = "okay";
};
&scp {
status = "okay";
};
&dsi0 {
status = "disabled";
};