// SPDX-License-Identifier: GPL-2.0-or-later /* * at91sam9rl.dtsi - Device Tree Include file for AT91SAM9RL family SoC * * Copyright (C) 2014 Microchip * Alexandre Belloni <alexandre.belloni@free-electrons.com> */ #include <dt-bindings/pinctrl/at91.h> #include <dt-bindings/clock/at91.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/pwm/pwm.h> #include <dt-bindings/mfd/at91-usart.h> / { #address-cells = <1>; #size-cells = <1>; model = "Atmel AT91SAM9RL family SoC"; compatible = "atmel,at91sam9rl", "atmel,at91sam9"; interrupt-parent = <&aic>; aliases { serial0 = &dbgu; serial1 = &usart0; serial2 = &usart1; serial3 = &usart2; serial4 = &usart3; gpio0 = &pioA; gpio1 = &pioB; gpio2 = &pioC; gpio3 = &pioD; tcb0 = &tcb0; i2c0 = &i2c0; i2c1 = &i2c1; ssc0 = &ssc0; ssc1 = &ssc1; pwm0 = &pwm0; }; cpus { #address-cells = <1>; #size-cells = <0>; cpu@0 { compatible = "arm,arm926ej-s"; device_type = "cpu"; reg = <0>; }; }; memory@20000000 { device_type = "memory"; reg = <0x20000000 0x04000000>; }; clocks { slow_xtal: slow_xtal { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <0>; }; main_xtal: main_xtal { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <0>; }; adc_op_clk: adc_op_clk { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <1000000>; }; }; sram: sram@300000 { compatible = "mmio-sram"; reg = <0x00300000 0x10000>; #address-cells = <1>; #size-cells = <1>; ranges = <0 0x00300000 0x10000>; }; ahb { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; ranges; fb0: fb@500000 { compatible = "atmel,at91sam9rl-lcdc"; reg = <0x00500000 0x1000>; interrupts = <23 IRQ_TYPE_LEVEL_HIGH 3>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_fb>; clocks = <&pmc PMC_TYPE_PERIPHERAL 23>, <&pmc PMC_TYPE_PERIPHERAL 23>; clock-names = "hclk", "lcdc_clk"; status = "disabled"; }; ebi: ebi@10000000 { compatible = "atmel,at91sam9rl-ebi"; #address-cells = <2>; #size-cells = <1>; atmel,smc = <&smc>; atmel,matrix = <&matrix>; reg = <0x10000000 0x80000000>; ranges = <0x0 0x0 0x10000000 0x10000000 0x1 0x0 0x20000000 0x10000000 0x2 0x0 0x30000000 0x10000000 0x3 0x0 0x40000000 0x10000000 0x4 0x0 0x50000000 0x10000000 0x5 0x0 0x60000000 0x10000000>; clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; status = "disabled"; nand_controller: nand-controller { compatible = "atmel,at91sam9g45-nand-controller"; #address-cells = <2>; #size-cells = <1>; ranges; status = "disabled"; }; }; apb { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; ranges; tcb0: timer@fffa0000 { compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon"; #address-cells = <1>; #size-cells = <0>; reg = <0xfffa0000 0x100>; interrupts = <16 IRQ_TYPE_LEVEL_HIGH 0>, <17 IRQ_TYPE_LEVEL_HIGH 0>, <18 IRQ_TYPE_LEVEL_HIGH 0>; clocks = <&pmc PMC_TYPE_PERIPHERAL 16>, <&pmc PMC_TYPE_PERIPHERAL 17>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&clk32k>; clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk"; }; mmc0: mmc@fffa4000 { compatible = "atmel,hsmci"; reg = <0xfffa4000 0x600>; interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>; #address-cells = <1>; #size-cells = <0>; pinctrl-names = "default"; clocks = <&pmc PMC_TYPE_PERIPHERAL 10>; clock-names = "mci_clk"; status = "disabled"; }; i2c0: i2c@fffa8000 { compatible = "atmel,at91sam9260-i2c"; reg = <0xfffa8000 0x100>; interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>; #address-cells = <1>; #size-cells = <0>; clocks = <&pmc PMC_TYPE_PERIPHERAL 11>; status = "disabled"; }; i2c1: i2c@fffac000 { compatible = "atmel,at91sam9260-i2c"; reg = <0xfffac000 0x100>; interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>; #address-cells = <1>; #size-cells = <0>; status = "disabled"; }; usart0: serial@fffb0000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffb0000 0x200>; atmel,usart-mode = <AT91_USART_MODE_SERIAL>; interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>; atmel,use-dma-rx; atmel,use-dma-tx; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart0>; clocks = <&pmc PMC_TYPE_PERIPHERAL 6>; clock-names = "usart"; status = "disabled"; }; usart1: serial@fffb4000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffb4000 0x200>; atmel,usart-mode = <AT91_USART_MODE_SERIAL>; interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>; atmel,use-dma-rx; atmel,use-dma-tx; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart1>; clocks = <&pmc PMC_TYPE_PERIPHERAL 7>; clock-names = "usart"; status = "disabled"; }; usart2: serial@fffb8000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffb8000 0x200>; atmel,usart-mode = <AT91_USART_MODE_SERIAL>; interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>; atmel,use-dma-rx; atmel,use-dma-tx; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart2>; clocks = <&pmc PMC_TYPE_PERIPHERAL 8>; clock-names = "usart"; status = "disabled"; }; usart3: serial@fffbc000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffbc000 0x200>; atmel,usart-mode = <AT91_USART_MODE_SERIAL>; interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>; atmel,use-dma-rx; atmel,use-dma-tx; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart3>; clocks = <&pmc PMC_TYPE_PERIPHERAL 9>; clock-names = "usart"; status = "disabled"; }; ssc0: ssc@fffc0000 { compatible = "atmel,at91sam9rl-ssc"; reg = <0xfffc0000 0x4000>; interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; status = "disabled"; }; ssc1: ssc@fffc4000 { compatible = "atmel,at91sam9rl-ssc"; reg = <0xfffc4000 0x4000>; interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>; status = "disabled"; }; pwm0: pwm@fffc8000 { compatible = "atmel,at91sam9rl-pwm"; reg = <0xfffc8000 0x300>; interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>; #pwm-cells = <3>; clocks = <&pmc PMC_TYPE_PERIPHERAL 19>; clock-names = "pwm_clk"; status = "disabled"; }; spi0: spi@fffcc000 { #address-cells = <1>; #size-cells = <0>; compatible = "atmel,at91rm9200-spi"; reg = <0xfffcc000 0x200>; interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_spi0>; clocks = <&pmc PMC_TYPE_PERIPHERAL 13>; clock-names = "spi_clk"; status = "disabled"; }; adc0: adc@fffd0000 { compatible = "atmel,at91sam9rl-adc"; reg = <0xfffd0000 0x100>; interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>; clocks = <&pmc PMC_TYPE_PERIPHERAL 20>, <&adc_op_clk>; clock-names = "adc_clk", "adc_op_clk"; atmel,adc-use-external-triggers; atmel,adc-channels-used = <0x3f>; atmel,adc-vref = <3300>; atmel,adc-startup-time = <40>; }; usb0: gadget@fffd4000 { compatible = "atmel,at91sam9rl-udc"; reg = <0x00600000 0x100000>, <0xfffd4000 0x4000>; interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>; clocks = <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_CORE PMC_UTMI>; clock-names = "pclk", "hclk"; status = "disabled"; }; dma0: dma-controller@ffffe600 { compatible = "atmel,at91sam9rl-dma"; reg = <0xffffe600 0x200>; interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>; #dma-cells = <2>; clocks = <&pmc PMC_TYPE_PERIPHERAL 21>; clock-names = "dma_clk"; }; ramc0: ramc@ffffea00 { compatible = "atmel,at91sam9260-sdramc"; reg = <0xffffea00 0x200>; }; smc: smc@ffffec00 { compatible = "atmel,at91sam9260-smc", "syscon"; reg = <0xffffec00 0x200>; }; matrix: matrix@ffffee00 { compatible = "atmel,at91sam9rl-matrix", "syscon"; reg = <0xffffee00 0x200>; }; aic: interrupt-controller@fffff000 { #interrupt-cells = <3>; compatible = "atmel,at91rm9200-aic"; interrupt-controller; reg = <0xfffff000 0x200>; atmel,external-irqs = <31>; }; dbgu: serial@fffff200 { compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; reg = <0xfffff200 0x200>; atmel,usart-mode = <AT91_USART_MODE_SERIAL>; interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_dbgu>; clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; clock-names = "usart"; status = "disabled"; }; pinctrl@fffff400 { #address-cells = <1>; #size-cells = <1>; compatible = "atmel,at91rm9200-pinctrl", "simple-bus"; ranges = <0xfffff400 0xfffff400 0x800>; atmel,mux-mask = /* A B */ <0xffffffff 0xe05c6738>, /* pioA */ <0xffffffff 0x0000c780>, /* pioB */ <0xffffffff 0xe3ffff0e>, /* pioC */ <0x003fffff 0x0001ff3c>; /* pioD */ /* shared pinctrl settings */ adc0 { pinctrl_adc0_ts: adc0_ts-0 { atmel,pins = <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE>, <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE>, <AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>, <AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; }; pinctrl_adc0_ad0: adc0_ad0-0 { atmel,pins = <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; }; pinctrl_adc0_ad1: adc0_ad1-0 { atmel,pins = <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; }; pinctrl_adc0_ad2: adc0_ad2-0 { atmel,pins = <AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; }; pinctrl_adc0_ad3: adc0_ad3-0 { atmel,pins = <AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; }; pinctrl_adc0_ad4: adc0_ad4-0 { atmel,pins = <AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_NONE>; }; pinctrl_adc0_ad5: adc0_ad5-0 { atmel,pins = <AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; }; pinctrl_adc0_adtrg: adc0_adtrg-0 { atmel,pins = <AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; }; }; dbgu { pinctrl_dbgu: dbgu-0 { atmel,pins = <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; }; }; ebi { pinctrl_ebi_addr_nand: ebi-addr-0 { atmel,pins = <AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>, <AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; }; }; fb { pinctrl_fb: fb-0 { atmel,pins = <AT91_PIOC 1 AT91_PERIPH_B AT91_PINCTRL_NONE>, <AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE>, <AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE>, <AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE>, <AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE>, <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>, <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>, <AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_NONE>, <AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_NONE>, <AT91_PIOC 13 AT91_PERIPH_B AT91_PINCTRL_NONE>, <AT91_PIOC 15 AT91_PERIPH_B AT91_PINCTRL_NONE>, <AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE>, <AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE>, <AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE>, <AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE>, <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE>, <AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE>, <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>, <AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>, <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>, <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>; }; }; i2c_gpio0 { pinctrl_i2c_gpio0: i2c_gpio0-0 { atmel,pins = <AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>, <AT91_PIOA 24 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; }; }; i2c_gpio1 { pinctrl_i2c_gpio1: i2c_gpio1-0 { atmel,pins = <AT91_PIOD 10 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>, <AT91_PIOD 11 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; }; }; mmc0 { pinctrl_mmc0_clk: mmc0_clk-0 { atmel,pins = <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; }; pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 { atmel,pins = <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; }; pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { atmel,pins = <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; }; }; nand { pinctrl_nand_rb: nand-rb-0 { atmel,pins = <AT91_PIOD 17 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; }; pinctrl_nand_cs: nand-cs-0 { atmel,pins = <AT91_PIOB 6 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; }; pinctrl_nand_oe_we: nand-oe-we-0 { atmel,pins = <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE>, <AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; }; }; pwm0 { pinctrl_pwm0_pwm0_0: pwm0_pwm0-0 { atmel,pins = <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; }; pinctrl_pwm0_pwm0_1: pwm0_pwm0-1 { atmel,pins = <AT91_PIOC 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; }; pinctrl_pwm0_pwm0_2: pwm0_pwm0-2 { atmel,pins = <AT91_PIOD 14 AT91_PERIPH_B AT91_PINCTRL_NONE>; }; pinctrl_pwm0_pwm1_0: pwm0_pwm1-0 { atmel,pins = <AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; }; pinctrl_pwm0_pwm1_1: pwm0_pwm1-1 { atmel,pins = <AT91_PIOC 3 AT91_PERIPH_B AT91_PINCTRL_NONE>; }; pinctrl_pwm0_pwm1_2: pwm0_pwm1-2 { atmel,pins = <AT91_PIOD 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; }; pinctrl_pwm0_pwm2_0: pwm0_pwm2-0 { atmel,pins = <AT91_PIOD 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; }; pinctrl_pwm0_pwm2_1: pwm0_pwm2-1 { atmel,pins = <AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; }; pinctrl_pwm0_pwm2_2: pwm0_pwm2-2 { atmel,pins = <AT91_PIOD 16 AT91_PERIPH_B AT91_PINCTRL_NONE>; }; pinctrl_pwm0_pwm3_0: pwm0_pwm3-0 { atmel,pins = <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; }; pinctrl_pwm0_pwm3_1: pwm0_pwm3-1 { atmel,pins = <AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; }; }; spi0 { pinctrl_spi0: spi0-0 { atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>, <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>, <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; }; }; ssc0 { pinctrl_ssc0_tx: ssc0_tx-0 { atmel,pins = <AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE>, <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE>, <AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE>; }; pinctrl_ssc0_rx: ssc0_rx-0 { atmel,pins = <AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE>, <AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE>, <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; }; }; ssc1 { pinctrl_ssc1_tx: ssc1_tx-0 { atmel,pins = <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>, <AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>, <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; }; pinctrl_ssc1_rx: ssc1_rx-0 { atmel,pins = <AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_NONE>, <AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE>, <AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_NONE>; }; }; tcb0 { pinctrl_tcb0_tclk0: tcb0_tclk0-0 { atmel,pins = <AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_NONE>; }; pinctrl_tcb0_tclk1: tcb0_tclk1-0 { atmel,pins = <AT91_PIOC 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; }; pinctrl_tcb0_tclk2: tcb0_tclk2-0 { atmel,pins = <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; }; pinctrl_tcb0_tioa0: tcb0_tioa0-0 { atmel,pins = <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_NONE>; }; pinctrl_tcb0_tioa1: tcb0_tioa1-0 { atmel,pins = <AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; }; pinctrl_tcb0_tioa2: tcb0_tioa2-0 { atmel,pins = <AT91_PIOD 10 AT91_PERIPH_B AT91_PINCTRL_NONE>; }; pinctrl_tcb0_tiob0: tcb0_tiob0-0 { atmel,pins = <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; }; pinctrl_tcb0_tiob1: tcb0_tiob1-0 { atmel,pins = <AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; }; pinctrl_tcb0_tiob2: tcb0_tiob2-0 { atmel,pins = <AT91_PIOD 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; }; }; usart0 { pinctrl_usart0: usart0-0 { atmel,pins = <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; }; pinctrl_usart0_rts: usart0_rts-0 { atmel,pins = <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; }; pinctrl_usart0_cts: usart0_cts-0 { atmel,pins = <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; }; pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 { atmel,pins = <AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE>, <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; }; pinctrl_usart0_dcd: usart0_dcd-0 { atmel,pins = <AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; }; pinctrl_usart0_ri: usart0_ri-0 { atmel,pins = <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; }; pinctrl_usart0_sck: usart0_sck-0 { atmel,pins = <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; }; }; usart1 { pinctrl_usart1: usart1-0 { atmel,pins = <AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; }; pinctrl_usart1_rts: usart1_rts-0 { atmel,pins = <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>; }; pinctrl_usart1_cts: usart1_cts-0 { atmel,pins = <AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; }; pinctrl_usart1_sck: usart1_sck-0 { atmel,pins = <AT91_PIOD 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; }; }; usart2 { pinctrl_usart2: usart2-0 { atmel,pins = <AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, <AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; }; pinctrl_usart2_rts: usart2_rts-0 { atmel,pins = <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; }; pinctrl_usart2_cts: usart2_cts-0 { atmel,pins = <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; }; pinctrl_usart2_sck: usart2_sck-0 { atmel,pins = <AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; }; }; usart3 { pinctrl_usart3: usart3-0 { atmel,pins = <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, <AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; }; pinctrl_usart3_rts: usart3_rts-0 { atmel,pins = <AT91_PIOD 4 AT91_PERIPH_B AT91_PINCTRL_NONE>; }; pinctrl_usart3_cts: usart3_cts-0 { atmel,pins = <AT91_PIOD 3 AT91_PERIPH_B AT91_PINCTRL_NONE>; }; pinctrl_usart3_sck: usart3_sck-0 { atmel,pins = <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>; }; }; pioA: gpio@fffff400 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff400 0x200>; interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller; #interrupt-cells = <2>; clocks = <&pmc PMC_TYPE_PERIPHERAL 2>; }; pioB: gpio@fffff600 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff600 0x200>; interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller; #interrupt-cells = <2>; clocks = <&pmc PMC_TYPE_PERIPHERAL 3>; }; pioC: gpio@fffff800 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff800 0x200>; interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller; #interrupt-cells = <2>; clocks = <&pmc PMC_TYPE_PERIPHERAL 4>; }; pioD: gpio@fffffa00 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffffa00 0x200>; interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>; #gpio-cells = <2>; gpio-controller; interrupt-controller; #interrupt-cells = <2>; clocks = <&pmc PMC_TYPE_PERIPHERAL 5>; }; }; pmc: clock-controller@fffffc00 { compatible = "atmel,at91sam9rl-pmc", "syscon"; reg = <0xfffffc00 0x100>; interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; #clock-cells = <2>; clocks = <&clk32k>, <&main_xtal>; clock-names = "slow_clk", "main_xtal"; }; reset-controller@fffffd00 { compatible = "atmel,at91sam9260-rstc"; reg = <0xfffffd00 0x10>; clocks = <&clk32k>; }; poweroff@fffffd10 { compatible = "atmel,at91sam9260-shdwc"; reg = <0xfffffd10 0x10>; clocks = <&clk32k>; }; pit: timer@fffffd30 { compatible = "atmel,at91sam9260-pit"; reg = <0xfffffd30 0xf>; interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; }; watchdog@fffffd40 { compatible = "atmel,at91sam9260-wdt"; reg = <0xfffffd40 0x10>; interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; clocks = <&clk32k>; status = "disabled"; }; clk32k: clock-controller@fffffd50 { compatible = "atmel,at91sam9x5-sckc"; reg = <0xfffffd50 0x4>; clocks = <&slow_xtal>; #clock-cells = <0>; }; rtc@fffffd20 { compatible = "atmel,at91sam9260-rtt"; reg = <0xfffffd20 0x10>; interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; clocks = <&clk32k>; status = "disabled"; }; gpbr: syscon@fffffd60 { compatible = "atmel,at91sam9260-gpbr", "syscon"; reg = <0xfffffd60 0x10>; status = "disabled"; }; rtc@fffffe00 { compatible = "atmel,at91rm9200-rtc"; reg = <0xfffffe00 0x40>; interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; clocks = <&clk32k>; status = "disabled"; }; }; }; i2c-gpio-0 { compatible = "i2c-gpio"; gpios = <&pioA 23 GPIO_ACTIVE_HIGH>, /* sda */ <&pioA 24 GPIO_ACTIVE_HIGH>; /* scl */ i2c-gpio,sda-open-drain; i2c-gpio,scl-open-drain; i2c-gpio,delay-us = <2>; /* ~100 kHz */ #address-cells = <1>; #size-cells = <0>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c_gpio0>; status = "disabled"; }; i2c-gpio-1 { compatible = "i2c-gpio"; gpios = <&pioD 10 GPIO_ACTIVE_HIGH>, /* sda */ <&pioD 11 GPIO_ACTIVE_HIGH>; /* scl */ i2c-gpio,sda-open-drain; i2c-gpio,scl-open-drain; i2c-gpio,delay-us = <2>; /* ~100 kHz */ #address-cells = <1>; #size-cells = <0>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c_gpio1>; status = "disabled"; }; };