# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/spi/fsl,spi-fsl-qspi.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Freescale Quad Serial Peripheral Interface (QuadSPI) maintainers: - Han Xu <han.xu@nxp.com> allOf: - $ref: spi-controller.yaml# properties: compatible: oneOf: - enum: - fsl,vf610-qspi - fsl,imx6sx-qspi - fsl,imx7d-qspi - fsl,imx6ul-qspi - fsl,ls1021a-qspi - fsl,ls2080a-qspi - items: - enum: - fsl,ls1043a-qspi - const: fsl,ls1021a-qspi - items: - enum: - fsl,imx8mq-qspi - const: fsl,imx7d-qspi reg: items: - description: registers - description: memory mapping reg-names: items: - const: QuadSPI - const: QuadSPI-memory interrupts: maxItems: 1 clocks: items: - description: SoC SPI qspi_en clock - description: SoC SPI qspi clock clock-names: items: - const: qspi_en - const: qspi required: - compatible - reg - reg-names - interrupts - clocks - clock-names unevaluatedProperties: false examples: - | #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/clock/fsl,qoriq-clockgen.h> soc { #address-cells = <2>; #size-cells = <2>; spi@1550000 { compatible = "fsl,ls1021a-qspi"; reg = <0x0 0x1550000 0x0 0x100000>, <0x0 0x40000000 0x0 0x10000000>; reg-names = "QuadSPI", "QuadSPI-memory"; interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(2)>, <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(2)>; clock-names = "qspi_en", "qspi"; flash@0 { compatible = "jedec,spi-nor"; spi-max-frequency = <50000000>; reg = <0>; spi-rx-bus-width = <4>; spi-tx-bus-width = <4>; }; }; };