# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/media/qcom,sdm845-venus.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm SDM845 Venus video encode and decode accelerators maintainers: - Stanimir Varbanov <stanimir.varbanov@linaro.org> description: | The Venus IP is a video encode and decode accelerator present on Qualcomm platforms allOf: - $ref: qcom,venus-common.yaml# properties: compatible: const: qcom,sdm845-venus power-domains: maxItems: 1 clocks: maxItems: 3 clock-names: items: - const: core - const: iface - const: bus iommus: maxItems: 2 video-core0: type: object properties: compatible: const: venus-decoder clocks: maxItems: 2 clock-names: items: - const: core - const: bus power-domains: maxItems: 1 required: - compatible - clocks - clock-names - power-domains additionalProperties: false video-core1: type: object properties: compatible: const: venus-encoder clocks: maxItems: 2 clock-names: items: - const: core - const: bus power-domains: maxItems: 1 required: - compatible - clocks - clock-names - power-domains additionalProperties: false required: - compatible - iommus - video-core0 - video-core1 unevaluatedProperties: false examples: - | #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/clock/qcom,videocc-sdm845.h> video-codec@aa00000 { compatible = "qcom,sdm845-venus"; reg = <0x0aa00000 0xff000>; interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; clocks = <&videocc VIDEO_CC_VENUS_CTL_CORE_CLK>, <&videocc VIDEO_CC_VENUS_AHB_CLK>, <&videocc VIDEO_CC_VENUS_CTL_AXI_CLK>; clock-names = "core", "iface", "bus"; power-domains = <&videocc VENUS_GDSC>; iommus = <&apps_smmu 0x10a0 0x8>, <&apps_smmu 0x10b0 0x0>; memory-region = <&venus_mem>; video-core0 { compatible = "venus-decoder"; clocks = <&videocc VIDEO_CC_VCODEC0_CORE_CLK>, <&videocc VIDEO_CC_VCODEC0_AXI_CLK>; clock-names = "core", "bus"; power-domains = <&videocc VCODEC0_GDSC>; }; video-core1 { compatible = "venus-encoder"; clocks = <&videocc VIDEO_CC_VCODEC1_CORE_CLK>, <&videocc VIDEO_CC_VCODEC1_AXI_CLK>; clock-names = "core", "bus"; power-domains = <&videocc VCODEC1_GDSC>; }; };