# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/interconnect/mediatek,cci.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: MediaTek Cache Coherent Interconnect (CCI) frequency and voltage scaling maintainers: - Jia-Wei Chang <jia-wei.chang@mediatek.com> - Johnson Wang <johnson.wang@mediatek.com> description: | MediaTek Cache Coherent Interconnect (CCI) is a hardware engine used by MT8183 and MT8186 SoCs to scale the frequency and adjust the voltage in hardware. It can also optimize the voltage to reduce the power consumption. properties: compatible: enum: - mediatek,mt8183-cci - mediatek,mt8186-cci clocks: items: - description: The multiplexer for clock input of the bus. - description: A parent of "bus" clock which is used as an intermediate clock source when the original clock source (PLL) is under transition and not stable yet. clock-names: items: - const: cci - const: intermediate operating-points-v2: true opp-table: type: object proc-supply: description: Phandle of the regulator for CCI that provides the supply voltage. sram-supply: description: Phandle of the regulator for sram of CCI that provides the supply voltage. When it is present, the implementation needs to do "voltage tracking" to step by step scale up/down Vproc and Vsram to fit SoC specific needs. When absent, the voltage scaling flow is handled by hardware, hence no software "voltage tracking" is needed. required: - compatible - clocks - clock-names - operating-points-v2 - proc-supply additionalProperties: false examples: - | #include <dt-bindings/clock/mt8183-clk.h> cci: cci { compatible = "mediatek,mt8183-cci"; clocks = <&mcucfg CLK_MCU_BUS_SEL>, <&topckgen CLK_TOP_ARMPLL_DIV_PLL1>; clock-names = "cci", "intermediate"; operating-points-v2 = <&cci_opp>; proc-supply = <&mt6358_vproc12_reg>; }; cci_opp: opp-table-cci { compatible = "operating-points-v2"; opp-shared; opp2_00: opp-273000000 { opp-hz = /bits/ 64 <273000000>; opp-microvolt = <650000>; }; opp2_01: opp-338000000 { opp-hz = /bits/ 64 <338000000>; opp-microvolt = <687500>; }; opp2_02: opp-403000000 { opp-hz = /bits/ 64 <403000000>; opp-microvolt = <718750>; }; opp2_03: opp-463000000 { opp-hz = /bits/ 64 <463000000>; opp-microvolt = <756250>; }; opp2_04: opp-546000000 { opp-hz = /bits/ 64 <546000000>; opp-microvolt = <800000>; }; opp2_05: opp-624000000 { opp-hz = /bits/ 64 <624000000>; opp-microvolt = <818750>; }; opp2_06: opp-689000000 { opp-hz = /bits/ 64 <689000000>; opp-microvolt = <850000>; }; opp2_07: opp-767000000 { opp-hz = /bits/ 64 <767000000>; opp-microvolt = <868750>; }; opp2_08: opp-845000000 { opp-hz = /bits/ 64 <845000000>; opp-microvolt = <893750>; }; opp2_09: opp-871000000 { opp-hz = /bits/ 64 <871000000>; opp-microvolt = <906250>; }; opp2_10: opp-923000000 { opp-hz = /bits/ 64 <923000000>; opp-microvolt = <931250>; }; opp2_11: opp-962000000 { opp-hz = /bits/ 64 <962000000>; opp-microvolt = <943750>; }; opp2_12: opp-1027000000 { opp-hz = /bits/ 64 <1027000000>; opp-microvolt = <975000>; }; opp2_13: opp-1092000000 { opp-hz = /bits/ 64 <1092000000>; opp-microvolt = <1000000>; }; opp2_14: opp-1144000000 { opp-hz = /bits/ 64 <1144000000>; opp-microvolt = <1025000>; }; opp2_15: opp-1196000000 { opp-hz = /bits/ 64 <1196000000>; opp-microvolt = <1050000>; }; };