// SPDX-License-Identifier: ISC /* * Device Tree file for Netgear WG302v2 based on IXP422BB * Derived from boardfiles written by Imre Kaloz */ /dts-v1/; #include "intel-ixp42x.dtsi" #include <dt-bindings/input/input.h> / { model = "Netgear WG302 v1"; compatible = "netgear,wg302v1", "intel,ixp42x"; #address-cells = <1>; #size-cells = <1>; memory@0 { /* 32 MB SDRAM according to boot arguments */ device_type = "memory"; reg = <0x00000000 0x02000000>; }; chosen { /* The RedBoot comes up in 9600 baud so let's keep this */ bootargs = "console=ttyS0,9600n8"; stdout-path = "uart1:9600n8"; }; aliases { /* These are switched around */ serial0 = &uart1; }; soc { bus@c4000000 { flash@0,0 { compatible = "intel,ixp4xx-flash", "cfi-flash"; bank-width = <2>; /* * 8 MB of Flash in 64 0x20000 sized blocks * mapped in at CS0. */ reg = <0 0x00000000 0x800000>; /* Configure expansion bus to allow writes */ intel,ixp4xx-eb-write-enable = <1>; partitions { compatible = "redboot-fis"; fis-index-block = <0x3f>; }; }; }; pci@c0000000 { status = "okay"; /* * Taken from WG302 v2 PCI boardfile (wg302v2-pci.c) * We have slots (IDSEL) 1 and 2 with one assigned IRQ * each handling all IRQs. */ #interrupt-cells = <1>; interrupt-map-mask = <0xf800 0 0 7>; interrupt-map = /* IDSEL 1 */ <0x0800 0 0 1 &gpio0 8 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 1 is irq 8 */ <0x0800 0 0 2 &gpio0 8 IRQ_TYPE_LEVEL_LOW>, /* INT B on slot 1 is irq 8 */ <0x0800 0 0 3 &gpio0 8 IRQ_TYPE_LEVEL_LOW>, /* INT C on slot 1 is irq 8 */ <0x0800 0 0 4 &gpio0 8 IRQ_TYPE_LEVEL_LOW>, /* INT D on slot 1 is irq 8 */ /* IDSEL 2 */ <0x1000 0 0 1 &gpio0 9 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 2 is irq 9 */ <0x1000 0 0 2 &gpio0 9 IRQ_TYPE_LEVEL_LOW>, /* INT B on slot 2 is irq 9 */ <0x1000 0 0 3 &gpio0 9 IRQ_TYPE_LEVEL_LOW>, /* INT C on slot 2 is irq 9 */ <0x1000 0 0 4 &gpio0 9 IRQ_TYPE_LEVEL_LOW>; /* INT D on slot 2 is irq 9 */ }; ethernet@c8009000 { status = "okay"; queue-rx = <&qmgr 3>; queue-txready = <&qmgr 20>; phy-mode = "rgmii"; phy-handle = <&phy30>; mdio { #address-cells = <1>; #size-cells = <0>; phy30: ethernet-phy@30 { reg = <30>; }; }; }; }; };