#ifndef __SOUND_DELTA_H
#define __SOUND_DELTA_H
#define DELTA_DEVICE_DESC \
"{MidiMan M Audio,Delta 1010},"\
"{MidiMan M Audio,Delta 1010LT},"\
"{MidiMan M Audio,Delta DiO 2496},"\
"{MidiMan M Audio,Delta 66},"\
"{MidiMan M Audio,Delta 44},"\
"{MidiMan M Audio,Delta 410},"\
"{MidiMan M Audio,Audiophile 24/96},"\
"{Digigram,VX442},"\
"{Lionstracs,Mediastation},"\
"{Edirol,DA2496},"
#define ICE1712_SUBDEVICE_DELTA1010 0x121430d6
#define ICE1712_SUBDEVICE_DELTA1010E 0xff1430d6
#define ICE1712_SUBDEVICE_DELTADIO2496 0x121431d6
#define ICE1712_SUBDEVICE_DELTA66 0x121432d6
#define ICE1712_SUBDEVICE_DELTA66E 0xff1432d6
#define ICE1712_SUBDEVICE_DELTA44 0x121433d6
#define ICE1712_SUBDEVICE_AUDIOPHILE 0x121434d6
#define ICE1712_SUBDEVICE_DELTA410 0x121438d6
#define ICE1712_SUBDEVICE_DELTA1010LT 0x12143bd6
#define ICE1712_SUBDEVICE_VX442 0x12143cd6
#define ICE1712_SUBDEVICE_MEDIASTATION 0x694c0100
#define ICE1712_SUBDEVICE_EDIROLDA2496 0xce164010
extern struct snd_ice1712_card_info snd_ice1712_delta_cards[];
#define ICE1712_DELTA_DFS 0x01 /* fast/slow sample rate mode */
#define ICE1712_DELTA_SPDIF_IN_STAT 0x02
#define ICE1712_DELTA_SPDIF_OUT_STAT_CLOCK 0x04
#define ICE1712_DELTA_SPDIF_OUT_STAT_DATA 0x08
#define ICE1712_DELTA_SPDIF_INPUT_SELECT 0x10
#define ICE1712_DELTA_WORD_CLOCK_SELECT 0x10
#define ICE1712_DELTA_WORD_CLOCK_STATUS 0x20
#define ICE1712_DELTA_CODEC_SERIAL_DATA 0x10
#define ICE1712_DELTA_CODEC_SERIAL_CLOCK 0x20
#define ICE1712_DELTA_CODEC_CHIP_A 0x40
#define ICE1712_DELTA_CODEC_CHIP_B 0x80
#define ICE1712_DELTA_AP_CCLK 0x02 /* SPI clock */
#define ICE1712_DELTA_AP_DIN 0x04 /* data input */
#define ICE1712_DELTA_AP_DOUT 0x08 /* data output */
#define ICE1712_DELTA_AP_CS_DIGITAL 0x10 /* CS8427 chip select */
#define ICE1712_DELTA_AP_CS_CODEC 0x20 /* AK4528 (audiophile), AK4529 (Delta410) chip select */
#define ICE1712_DELTA_1010LT_CCLK 0x02 /* SPI clock (AK4524 + CS8427) */
#define ICE1712_DELTA_1010LT_DIN 0x04 /* data input (CS8427) */
#define ICE1712_DELTA_1010LT_DOUT 0x08 /* data output (AK4524 + CS8427) */
#define ICE1712_DELTA_1010LT_CS 0x70 /* mask for CS address */
#define ICE1712_DELTA_1010LT_CS_CHIP_A 0x00 /* AK4524 #0 */
#define ICE1712_DELTA_1010LT_CS_CHIP_B 0x10 /* AK4524 #1 */
#define ICE1712_DELTA_1010LT_CS_CHIP_C 0x20 /* AK4524 #2 */
#define ICE1712_DELTA_1010LT_CS_CHIP_D 0x30 /* AK4524 #3 */
#define ICE1712_DELTA_1010LT_CS_CS8427 0x40 /* CS8427 */
#define ICE1712_DELTA_1010LT_CS_NONE 0x50 /* nothing */
#define ICE1712_DELTA_1010LT_WORDCLOCK 0x80 /* sample clock source: 0 = Word Clock Input, 1 = S/PDIF Input ??? */
#define ICE1712_DELTA_66E_CCLK 0x02 /* SPI clock */
#define ICE1712_DELTA_66E_DIN 0x04 /* data input */
#define ICE1712_DELTA_66E_DOUT 0x08 /* data output */
#define ICE1712_DELTA_66E_CS_CS8427 0x10 /* chip select, low = CS8427 */
#define ICE1712_DELTA_66E_CS_CHIP_A 0x20 /* AK4524 #0 */
#define ICE1712_DELTA_66E_CS_CHIP_B 0x40 /* AK4524 #1 */
#define ICE1712_VX442_CCLK 0x02 /* SPI clock */
#define ICE1712_VX442_DIN 0x04 /* data input */
#define ICE1712_VX442_DOUT 0x08 /* data output */
#define ICE1712_VX442_CS_DIGITAL 0x10 /* chip select, low = CS8427 */
#define ICE1712_VX442_CODEC_CHIP_A 0x20 /* select chip A */
#define ICE1712_VX442_CODEC_CHIP_B 0x40 /* select chip B */
#endif /* __SOUND_DELTA_H */