# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/pinctrl/fsl,imx8m-pinctrl.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Freescale IMX8M IOMUX Controller maintainers: - Peng Fan <peng.fan@nxp.com> description: Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory for common binding part and usage. properties: compatible: enum: - fsl,imx8mm-iomuxc - fsl,imx8mn-iomuxc - fsl,imx8mp-iomuxc - fsl,imx8mq-iomuxc reg: maxItems: 1 # Client device subnode's properties patternProperties: 'grp$': type: object description: Pinctrl node's client devices use subnodes for desired pin configuration. Client device subnodes use below standard properties. properties: fsl,pins: description: each entry consists of 6 integers and represents the mux and config setting for one pin. The first 5 integers <mux_reg conf_reg input_reg mux_val input_val> are specified using a PIN_FUNC_ID macro, which can be found in <arch/arm64/boot/dts/freescale/imx8m[m,n,p,q]-pinfunc.h>. The last integer CONFIG is the pad setting value like pull-up on this pin. Please refer to i.MX8M Mini/Nano/Plus/Quad Reference Manual for detailed CONFIG settings. $ref: /schemas/types.yaml#/definitions/uint32-matrix items: items: - description: | "mux_reg" indicates the offset of mux register. - description: | "conf_reg" indicates the offset of pad configuration register. - description: | "input_reg" indicates the offset of select input register. - description: | "mux_val" indicates the mux value to be applied. - description: | "input_val" indicates the select input value to be applied. - description: | "pad_setting" indicates the pad configuration value to be applied. required: - fsl,pins additionalProperties: false allOf: - $ref: pinctrl.yaml# required: - compatible - reg additionalProperties: false examples: # Pinmux controller node - | iomuxc: pinctrl@30330000 { compatible = "fsl,imx8mm-iomuxc"; reg = <0x30330000 0x10000>; pinctrl_uart2: uart2grp { fsl,pins = <0x23C 0x4A4 0x4FC 0x0 0x0 0x140>, <0x240 0x4A8 0x000 0x0 0x0 0x140>; }; }; ...