#ifndef ASIC_REG_ARC_FARM_KDMA_CTX_AXUSER_REGS_H_
#define ASIC_REG_ARC_FARM_KDMA_CTX_AXUSER_REGS_H_
#define mmARC_FARM_KDMA_CTX_AXUSER_HB_ASID 0x4E8B800
#define mmARC_FARM_KDMA_CTX_AXUSER_HB_MMU_BP 0x4E8B804
#define mmARC_FARM_KDMA_CTX_AXUSER_HB_STRONG_ORDER 0x4E8B808
#define mmARC_FARM_KDMA_CTX_AXUSER_HB_NO_SNOOP 0x4E8B80C
#define mmARC_FARM_KDMA_CTX_AXUSER_HB_WR_REDUCTION 0x4E8B810
#define mmARC_FARM_KDMA_CTX_AXUSER_HB_RD_ATOMIC 0x4E8B814
#define mmARC_FARM_KDMA_CTX_AXUSER_HB_QOS 0x4E8B818
#define mmARC_FARM_KDMA_CTX_AXUSER_HB_RSVD 0x4E8B81C
#define mmARC_FARM_KDMA_CTX_AXUSER_HB_EMEM_CPAGE 0x4E8B820
#define mmARC_FARM_KDMA_CTX_AXUSER_HB_CORE 0x4E8B824
#define mmARC_FARM_KDMA_CTX_AXUSER_E2E_COORD 0x4E8B828
#define mmARC_FARM_KDMA_CTX_AXUSER_HB_WR_OVRD_LO 0x4E8B830
#define mmARC_FARM_KDMA_CTX_AXUSER_HB_WR_OVRD_HI 0x4E8B834
#define mmARC_FARM_KDMA_CTX_AXUSER_HB_RD_OVRD_LO 0x4E8B838
#define mmARC_FARM_KDMA_CTX_AXUSER_HB_RD_OVRD_HI 0x4E8B83C
#define mmARC_FARM_KDMA_CTX_AXUSER_LB_COORD 0x4E8B840
#define mmARC_FARM_KDMA_CTX_AXUSER_LB_LOCK 0x4E8B844
#define mmARC_FARM_KDMA_CTX_AXUSER_LB_RSVD 0x4E8B848
#define mmARC_FARM_KDMA_CTX_AXUSER_LB_OVRD 0x4E8B84C
#endif /* ASIC_REG_ARC_FARM_KDMA_CTX_AXUSER_REGS_H_ */