Directory Files
.. 120
File Size
Kconfig 706 B
Makefile 297 B
clk-agilex.c 18 kB
clk-gate-a10.c 3.0 kB
clk-gate-s10.c 6.4 kB
clk-gate.c 5.6 kB
clk-periph-a10.c 3.3 kB
clk-periph-s10.c 5.2 kB
clk-periph.c 2.9 kB
clk-pll-a10.c 3.4 kB
clk-pll-s10.c 7.6 kB
clk-pll.c 3.5 kB
clk-s10.c 15 kB
clk.c 761 B
clk.h 1.8 kB
stratix10-clk.h 2.4 kB

Linux v6.6.1 - socfpga

# SPDX-License-Identifier: GPL-2.0
config CLK_INTEL_SOCFPGA
	bool "Intel SoCFPGA family clock support" if COMPILE_TEST && !ARCH_INTEL_SOCFPGA
	default ARCH_INTEL_SOCFPGA
	help
	  Support for the clock controllers present on Intel SoCFPGA and eASIC
	  devices like Aria, Cyclone, Stratix 10, Agilex and N5X eASIC.

if CLK_INTEL_SOCFPGA

config CLK_INTEL_SOCFPGA32
	bool "Intel Aria / Cyclone clock controller support" if COMPILE_TEST && (!ARM || !ARCH_INTEL_SOCFPGA)
	default ARM && ARCH_INTEL_SOCFPGA

config CLK_INTEL_SOCFPGA64
	bool "Intel Stratix / Agilex / N5X clock controller support" if COMPILE_TEST && (!ARM64 || !ARCH_INTEL_SOCFPGA)
	default ARM64 && ARCH_INTEL_SOCFPGA

endif # CLK_INTEL_SOCFPGA