# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/soc/starfive/starfive,jh7110-syscon.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: StarFive JH7110 SoC system controller maintainers: - William Qiu <william.qiu@starfivetech.com> description: The StarFive JH7110 SoC system controller provides register information such as offset, mask and shift to configure related modules such as MMC and PCIe. properties: compatible: oneOf: - items: - const: starfive,jh7110-sys-syscon - const: syscon - const: simple-mfd - items: - enum: - starfive,jh7110-aon-syscon - starfive,jh7110-stg-syscon - const: syscon reg: maxItems: 1 clock-controller: $ref: /schemas/clock/starfive,jh7110-pll.yaml# type: object "#power-domain-cells": const: 1 required: - compatible - reg allOf: - if: properties: compatible: contains: const: starfive,jh7110-sys-syscon then: required: - clock-controller else: properties: clock-controller: false - if: properties: compatible: contains: const: starfive,jh7110-aon-syscon then: required: - "#power-domain-cells" else: properties: "#power-domain-cells": false additionalProperties: false examples: - | syscon@10240000 { compatible = "starfive,jh7110-stg-syscon", "syscon"; reg = <0x10240000 0x1000>; }; syscon@13030000 { compatible = "starfive,jh7110-sys-syscon", "syscon", "simple-mfd"; reg = <0x13030000 0x1000>; clock-controller { compatible = "starfive,jh7110-pll"; clocks = <&osc>; #clock-cells = <1>; }; }; syscon@17010000 { compatible = "starfive,jh7110-aon-syscon", "syscon"; reg = <0x17010000 0x1000>; #power-domain-cells = <1>; }; ...