// SPDX-License-Identifier: GPL-2.0-or-later OR MIT /* * Copyright (c) 2014 Protonic Holland */ /dts-v1/; #include "imx6dl.dtsi" #include "imx6qdl-prti6q.dtsi" #include <dt-bindings/leds/common.h> / { model = "Protonic RVT board"; compatible = "prt,prtrvt", "fsl,imx6dl"; memory@10000000 { device_type = "memory"; reg = <0x10000000 0x10000000>; }; leds { compatible = "gpio-leds"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_leds>; led-debug0 { function = LED_FUNCTION_STATUS; gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>; linux,default-trigger = "heartbeat"; }; }; }; &can1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_can1 &pinctrl_can1phy>; status = "okay"; }; &ecspi1 { cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ecspi1>; status = "okay"; flash@0 { compatible = "jedec,spi-nor"; reg = <0>; spi-max-frequency = <20000000>; #address-cells = <1>; #size-cells = <1>; }; }; &ecspi3 { cs-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ecspi3>; status = "okay"; nfc@0 { compatible = "ti,trf7970a"; reg = <0>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_nfc>; spi-max-frequency = <2000000>; interrupts-extended = <&gpio5 14 IRQ_TYPE_LEVEL_LOW>; ti,enable-gpios = <&gpio5 12 GPIO_ACTIVE_LOW>, <&gpio5 11 GPIO_ACTIVE_LOW>; vin-supply = <®_3v3>; autosuspend-delay = <30000>; irq-status-read-quirk; en2-rf-quirk; status = "okay"; }; }; &i2c3 { adc@49 { compatible = "ti,ads1015"; reg = <0x49>; #address-cells = <1>; #size-cells = <0>; /* nc */ channel@4 { reg = <4>; ti,gain = <3>; ti,datarate = <3>; }; /* nc */ channel@5 { reg = <5>; ti,gain = <3>; ti,datarate = <3>; }; /* can1_l */ channel@6 { reg = <6>; ti,gain = <3>; ti,datarate = <3>; }; /* can1_h */ channel@7 { reg = <7>; ti,gain = <3>; ti,datarate = <3>; }; }; rtc@51 { compatible = "nxp,pcf8563"; reg = <0x51>; }; }; &pcie { status = "okay"; }; &usbh1 { status = "disabled"; }; &usbotg { disable-over-current; }; &vpu { status = "disabled"; }; &iomuxc { pinctrl_can1phy: can1phy { fsl,pins = < /* CAN1_SR */ MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x13070 /* CAN1_TERM */ MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0 >; }; pinctrl_ecspi1: ecspi1grp { fsl,pins = < MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 /* CS */ MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x000b1 >; }; pinctrl_ecspi3: ecspi3grp { fsl,pins = < MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1 MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1 MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1 MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x000b1 >; }; pinctrl_leds: ledsgrp { fsl,pins = < MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x1b0b0 >; }; pinctrl_nfc: nfcgrp { fsl,pins = < /* NFC_ASK_OOK */ MX6QDL_PAD_DISP0_DAT15__GPIO5_IO09 0x100b1 /* NFC_PWR_EN */ MX6QDL_PAD_DISP0_DAT16__GPIO5_IO10 0x100b1 /* NFC_EN2 */ MX6QDL_PAD_DISP0_DAT17__GPIO5_IO11 0x100b1 /* NFC_EN */ MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12 0x100b1 /* NFC_MOD */ MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13 0x100b1 /* NFC_IRQ */ MX6QDL_PAD_DISP0_DAT20__GPIO5_IO14 0x100b1 >; }; };