#ifndef ASIC_REG_DMA_IF_W_N_DOWN_CH0_REGS_H_
#define ASIC_REG_DMA_IF_W_N_DOWN_CH0_REGS_H_
#define mmDMA_IF_W_N_DOWN_CH0_PERM_SEL 0x4C1108
#define mmDMA_IF_W_N_DOWN_CH0_HBM_POLY_H3_0 0x4C1114
#define mmDMA_IF_W_N_DOWN_CH0_HBM_POLY_H3_1 0x4C1118
#define mmDMA_IF_W_N_DOWN_CH0_HBM_POLY_H3_2 0x4C111C
#define mmDMA_IF_W_N_DOWN_CH0_HBM_POLY_H3_3 0x4C1120
#define mmDMA_IF_W_N_DOWN_CH0_HBM_POLY_H3_4 0x4C1124
#define mmDMA_IF_W_N_DOWN_CH0_HBM_POLY_H3_5 0x4C1128
#define mmDMA_IF_W_N_DOWN_CH0_HBM_POLY_H3_6 0x4C112C
#define mmDMA_IF_W_N_DOWN_CH0_HBM_POLY_H3_7 0x4C1130
#define mmDMA_IF_W_N_DOWN_CH0_HBM_POLY_H3_8 0x4C1134
#define mmDMA_IF_W_N_DOWN_CH0_HBM_POLY_H3_9 0x4C1138
#define mmDMA_IF_W_N_DOWN_CH0_HBM_POLY_H3_10 0x4C113C
#define mmDMA_IF_W_N_DOWN_CH0_HBM_POLY_H3_11 0x4C1140
#define mmDMA_IF_W_N_DOWN_CH0_HBM_POLY_H3_12 0x4C1144
#define mmDMA_IF_W_N_DOWN_CH0_HBM_POLY_H3_13 0x4C1148
#define mmDMA_IF_W_N_DOWN_CH0_HBM_POLY_H3_14 0x4C114C
#define mmDMA_IF_W_N_DOWN_CH0_HBM_POLY_H3_15 0x4C1150
#define mmDMA_IF_W_N_DOWN_CH0_HBM_POLY_H3_16 0x4C1154
#define mmDMA_IF_W_N_DOWN_CH0_HBM_POLY_H3_17 0x4C1158
#define mmDMA_IF_W_N_DOWN_CH0_HBM_POLY_H3_18 0x4C115C
#define mmDMA_IF_W_N_DOWN_CH0_HBM_POLY_H3_19 0x4C1160
#define mmDMA_IF_W_N_DOWN_CH0_HBM_POLY_H3_20 0x4C1164
#define mmDMA_IF_W_N_DOWN_CH0_HBM_POLY_H3_21 0x4C1168
#define mmDMA_IF_W_N_DOWN_CH0_HBM_POLY_H3_22 0x4C116C
#define mmDMA_IF_W_N_DOWN_CH0_HBM_POLY_H3_23 0x4C1170
#define mmDMA_IF_W_N_DOWN_CH0_HBM_POLY_H3_24 0x4C1174
#define mmDMA_IF_W_N_DOWN_CH0_HBM_POLY_H3_25 0x4C1178
#define mmDMA_IF_W_N_DOWN_CH0_HBM_POLY_H3_26 0x4C117C
#define mmDMA_IF_W_N_DOWN_CH0_HBM_POLY_H3_27 0x4C1180
#define mmDMA_IF_W_N_DOWN_CH0_SRAM_POLY_H3_0 0x4C1184
#define mmDMA_IF_W_N_DOWN_CH0_SRAM_POLY_H3_1 0x4C1188
#define mmDMA_IF_W_N_DOWN_CH0_SRAM_POLY_H3_2 0x4C118C
#define mmDMA_IF_W_N_DOWN_CH0_SRAM_POLY_H3_3 0x4C1190
#define mmDMA_IF_W_N_DOWN_CH0_SRAM_POLY_H3_4 0x4C1194
#define mmDMA_IF_W_N_DOWN_CH0_SRAM_POLY_H3_5 0x4C1198
#define mmDMA_IF_W_N_DOWN_CH0_SRAM_POLY_H3_6 0x4C119C
#define mmDMA_IF_W_N_DOWN_CH0_SRAM_POLY_H3_7 0x4C11A0
#define mmDMA_IF_W_N_DOWN_CH0_SRAM_POLY_H3_8 0x4C11A4
#define mmDMA_IF_W_N_DOWN_CH0_SRAM_POLY_H3_9 0x4C11A8
#define mmDMA_IF_W_N_DOWN_CH0_SRAM_POLY_H3_10 0x4C11AC
#define mmDMA_IF_W_N_DOWN_CH0_SRAM_POLY_H3_11 0x4C11B0
#define mmDMA_IF_W_N_DOWN_CH0_SRAM_POLY_H3_12 0x4C11B4
#define mmDMA_IF_W_N_DOWN_CH0_SRAM_POLY_H3_13 0x4C11B8
#define mmDMA_IF_W_N_DOWN_CH0_SRAM_POLY_H3_14 0x4C11BC
#define mmDMA_IF_W_N_DOWN_CH0_SCRAM_SRAM_EN 0x4C126C
#define mmDMA_IF_W_N_DOWN_CH0_RL_HBM_EN 0x4C1274
#define mmDMA_IF_W_N_DOWN_CH0_RL_HBM_SAT 0x4C1278
#define mmDMA_IF_W_N_DOWN_CH0_RL_HBM_RST 0x4C127C
#define mmDMA_IF_W_N_DOWN_CH0_RL_HBM_TIMEOUT 0x4C1280
#define mmDMA_IF_W_N_DOWN_CH0_SCRAM_HBM_EN 0x4C1284
#define mmDMA_IF_W_N_DOWN_CH0_RL_PCI_EN 0x4C1288
#define mmDMA_IF_W_N_DOWN_CH0_RL_PCI_SAT 0x4C128C
#define mmDMA_IF_W_N_DOWN_CH0_RL_PCI_RST 0x4C1290
#define mmDMA_IF_W_N_DOWN_CH0_RL_PCI_TIMEOUT 0x4C1294
#define mmDMA_IF_W_N_DOWN_CH0_RL_SRAM_EN 0x4C129C
#define mmDMA_IF_W_N_DOWN_CH0_RL_SRAM_SAT 0x4C12A0
#define mmDMA_IF_W_N_DOWN_CH0_RL_SRAM_RST 0x4C12A4
#define mmDMA_IF_W_N_DOWN_CH0_RL_SRAM_TIMEOUT 0x4C12AC
#define mmDMA_IF_W_N_DOWN_CH0_RL_SRAM_RED 0x4C12B4
#define mmDMA_IF_W_N_DOWN_CH0_E2E_HBM_EN 0x4C12EC
#define mmDMA_IF_W_N_DOWN_CH0_E2E_PCI_EN 0x4C12F0
#define mmDMA_IF_W_N_DOWN_CH0_E2E_HBM_WR_SIZE 0x4C12F4
#define mmDMA_IF_W_N_DOWN_CH0_E2E_PCI_WR_SIZE 0x4C12F8
#define mmDMA_IF_W_N_DOWN_CH0_E2E_AW_PCI_CTR_SET_EN 0x4C1404
#define mmDMA_IF_W_N_DOWN_CH0_E2E_AW_PCI_CTR_SET 0x4C1408
#define mmDMA_IF_W_N_DOWN_CH0_E2E_AW_PCI_CTR_WRAP 0x4C140C
#define mmDMA_IF_W_N_DOWN_CH0_E2E_AW_PCI_CTR_CNT 0x4C1410
#define mmDMA_IF_W_N_DOWN_CH0_E2E_AW_HBM_CTR_SET_EN 0x4C1414
#define mmDMA_IF_W_N_DOWN_CH0_E2E_AW_HBM_CTR_SET 0x4C1418
#define mmDMA_IF_W_N_DOWN_CH0_E2E_HBM_RD_SIZE 0x4C141C
#define mmDMA_IF_W_N_DOWN_CH0_E2E_PCI_RD_SIZE 0x4C1420
#define mmDMA_IF_W_N_DOWN_CH0_E2E_AR_PCI_CTR_SET_EN 0x4C1424
#define mmDMA_IF_W_N_DOWN_CH0_E2E_AR_PCI_CTR_SET 0x4C1428
#define mmDMA_IF_W_N_DOWN_CH0_E2E_AR_PCI_CTR_WRAP 0x4C142C
#define mmDMA_IF_W_N_DOWN_CH0_E2E_AR_PCI_CTR_CNT 0x4C1430
#define mmDMA_IF_W_N_DOWN_CH0_E2E_AR_HBM_CTR_SET_EN 0x4C1434
#define mmDMA_IF_W_N_DOWN_CH0_E2E_AR_HBM_CTR_SET 0x4C1438
#define mmDMA_IF_W_N_DOWN_CH0_NL_HBM_SEL_0 0x4C1450
#define mmDMA_IF_W_N_DOWN_CH0_NL_HBM_SEL_1 0x4C1454
#define mmDMA_IF_W_N_DOWN_CH0_NON_LIN_EN 0x4C1480
#define mmDMA_IF_W_N_DOWN_CH0_NL_SRAM_BANK_0 0x4C1500
#define mmDMA_IF_W_N_DOWN_CH0_NL_SRAM_BANK_1 0x4C1504
#define mmDMA_IF_W_N_DOWN_CH0_NL_SRAM_BANK_2 0x4C1508
#define mmDMA_IF_W_N_DOWN_CH0_NL_SRAM_BANK_3 0x4C150C
#define mmDMA_IF_W_N_DOWN_CH0_NL_SRAM_BANK_4 0x4C1510
#define mmDMA_IF_W_N_DOWN_CH0_NL_SRAM_OFFSET_0 0x4C1514
#define mmDMA_IF_W_N_DOWN_CH0_NL_SRAM_OFFSET_1 0x4C1520
#define mmDMA_IF_W_N_DOWN_CH0_NL_SRAM_OFFSET_2 0x4C1524
#define mmDMA_IF_W_N_DOWN_CH0_NL_SRAM_OFFSET_3 0x4C1528
#define mmDMA_IF_W_N_DOWN_CH0_NL_SRAM_OFFSET_4 0x4C152C
#define mmDMA_IF_W_N_DOWN_CH0_NL_SRAM_OFFSET_5 0x4C1530
#define mmDMA_IF_W_N_DOWN_CH0_NL_SRAM_OFFSET_6 0x4C1534
#define mmDMA_IF_W_N_DOWN_CH0_NL_SRAM_OFFSET_7 0x4C1538
#define mmDMA_IF_W_N_DOWN_CH0_NL_SRAM_OFFSET_8 0x4C153C
#define mmDMA_IF_W_N_DOWN_CH0_NL_SRAM_OFFSET_9 0x4C1540
#define mmDMA_IF_W_N_DOWN_CH0_NL_HBM_OFFSET_0 0x4C1550
#define mmDMA_IF_W_N_DOWN_CH0_NL_HBM_OFFSET_1 0x4C1554
#define mmDMA_IF_W_N_DOWN_CH0_NL_HBM_OFFSET_2 0x4C1558
#define mmDMA_IF_W_N_DOWN_CH0_NL_HBM_OFFSET_3 0x4C155C
#define mmDMA_IF_W_N_DOWN_CH0_NL_HBM_OFFSET_4 0x4C1560
#define mmDMA_IF_W_N_DOWN_CH0_NL_HBM_OFFSET_5 0x4C1564
#define mmDMA_IF_W_N_DOWN_CH0_NL_HBM_OFFSET_6 0x4C1568
#define mmDMA_IF_W_N_DOWN_CH0_NL_HBM_OFFSET_7 0x4C156C
#define mmDMA_IF_W_N_DOWN_CH0_NL_HBM_OFFSET_8 0x4C1570
#define mmDMA_IF_W_N_DOWN_CH0_NL_HBM_OFFSET_9 0x4C1574
#define mmDMA_IF_W_N_DOWN_CH0_NL_HBM_OFFSET_10 0x4C1578
#define mmDMA_IF_W_N_DOWN_CH0_NL_HBM_OFFSET_11 0x4C157C
#define mmDMA_IF_W_N_DOWN_CH0_NL_HBM_OFFSET_12 0x4C1580
#define mmDMA_IF_W_N_DOWN_CH0_NL_HBM_OFFSET_13 0x4C1584
#define mmDMA_IF_W_N_DOWN_CH0_NL_HBM_OFFSET_14 0x4C1588
#define mmDMA_IF_W_N_DOWN_CH0_NL_HBM_OFFSET_15 0x4C158C
#define mmDMA_IF_W_N_DOWN_CH0_NL_HBM_OFFSET_16 0x4C1590
#define mmDMA_IF_W_N_DOWN_CH0_NL_HBM_OFFSET_17 0x4C1594
#define mmDMA_IF_W_N_DOWN_CH0_NL_HBM_OFFSET_18 0x4C1598
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_BASE_LOW_AW_0 0x4C15E4
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_BASE_LOW_AW_1 0x4C15E8
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_BASE_LOW_AW_2 0x4C15EC
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_BASE_LOW_AW_3 0x4C15F0
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_BASE_LOW_AW_4 0x4C15F4
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_BASE_LOW_AW_5 0x4C15F8
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_BASE_LOW_AW_6 0x4C15FC
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_BASE_LOW_AW_7 0x4C1600
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_BASE_LOW_AW_8 0x4C1604
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_BASE_LOW_AW_9 0x4C1608
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_BASE_LOW_AW_10 0x4C160C
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_BASE_LOW_AW_11 0x4C1610
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_BASE_LOW_AW_12 0x4C1614
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_BASE_LOW_AW_13 0x4C1618
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_BASE_LOW_AW_14 0x4C161C
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_BASE_LOW_AW_15 0x4C1620
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_BASE_HIGH_AW_0 0x4C1624
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_BASE_HIGH_AW_1 0x4C1628
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_BASE_HIGH_AW_2 0x4C162C
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_BASE_HIGH_AW_3 0x4C1630
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_BASE_HIGH_AW_4 0x4C1634
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_BASE_HIGH_AW_5 0x4C1638
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_BASE_HIGH_AW_6 0x4C163C
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_BASE_HIGH_AW_7 0x4C1640
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_BASE_HIGH_AW_8 0x4C1644
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_BASE_HIGH_AW_9 0x4C1648
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_BASE_HIGH_AW_10 0x4C164C
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_BASE_HIGH_AW_11 0x4C1650
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_BASE_HIGH_AW_12 0x4C1654
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_BASE_HIGH_AW_13 0x4C1658
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_BASE_HIGH_AW_14 0x4C165C
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_BASE_HIGH_AW_15 0x4C1660
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_MASK_LOW_AW_0 0x4C1664
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_MASK_LOW_AW_1 0x4C1668
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_MASK_LOW_AW_2 0x4C166C
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_MASK_LOW_AW_3 0x4C1670
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_MASK_LOW_AW_4 0x4C1674
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_MASK_LOW_AW_5 0x4C1678
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_MASK_LOW_AW_6 0x4C167C
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_MASK_LOW_AW_7 0x4C1680
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_MASK_LOW_AW_8 0x4C1684
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_MASK_LOW_AW_9 0x4C1688
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_MASK_LOW_AW_10 0x4C168C
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_MASK_LOW_AW_11 0x4C1690
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_MASK_LOW_AW_12 0x4C1694
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_MASK_LOW_AW_13 0x4C1698
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_MASK_LOW_AW_14 0x4C169C
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_MASK_LOW_AW_15 0x4C16A0
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_MASK_HIGH_AW_0 0x4C16A4
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_MASK_HIGH_AW_1 0x4C16A8
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_MASK_HIGH_AW_2 0x4C16AC
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_MASK_HIGH_AW_3 0x4C16B0
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_MASK_HIGH_AW_4 0x4C16B4
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_MASK_HIGH_AW_5 0x4C16B8
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_MASK_HIGH_AW_6 0x4C16BC
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_MASK_HIGH_AW_7 0x4C16C0
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_MASK_HIGH_AW_8 0x4C16C4
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_MASK_HIGH_AW_9 0x4C16C8
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_MASK_HIGH_AW_10 0x4C16CC
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_MASK_HIGH_AW_11 0x4C16D0
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_MASK_HIGH_AW_12 0x4C16D4
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_MASK_HIGH_AW_13 0x4C16D8
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_MASK_HIGH_AW_14 0x4C16DC
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_MASK_HIGH_AW_15 0x4C16E0
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_BASE_LOW_AW_0 0x4C16E4
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_BASE_LOW_AW_1 0x4C16E8
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_BASE_LOW_AW_2 0x4C16EC
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_BASE_LOW_AW_3 0x4C16F0
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_BASE_LOW_AW_4 0x4C16F4
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_BASE_LOW_AW_5 0x4C16F8
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_BASE_LOW_AW_6 0x4C16FC
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_BASE_LOW_AW_7 0x4C1700
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_BASE_LOW_AW_8 0x4C1704
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_BASE_LOW_AW_9 0x4C1708
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_BASE_LOW_AW_10 0x4C170C
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_BASE_LOW_AW_11 0x4C1710
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_BASE_LOW_AW_12 0x4C1714
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_BASE_LOW_AW_13 0x4C1718
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_BASE_LOW_AW_14 0x4C171C
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_BASE_LOW_AW_15 0x4C1720
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_BASE_HIGH_AW_0 0x4C1724
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_BASE_HIGH_AW_1 0x4C1728
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_BASE_HIGH_AW_2 0x4C172C
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_BASE_HIGH_AW_3 0x4C1730
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_BASE_HIGH_AW_4 0x4C1734
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_BASE_HIGH_AW_5 0x4C1738
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_BASE_HIGH_AW_6 0x4C173C
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_BASE_HIGH_AW_7 0x4C1740
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_BASE_HIGH_AW_8 0x4C1744
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_BASE_HIGH_AW_9 0x4C1748
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_BASE_HIGH_AW_10 0x4C174C
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_BASE_HIGH_AW_11 0x4C1750
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_BASE_HIGH_AW_12 0x4C1754
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_BASE_HIGH_AW_13 0x4C1758
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_BASE_HIGH_AW_14 0x4C175C
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_BASE_HIGH_AW_15 0x4C1760
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_MASK_LOW_AW_0 0x4C1764
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_MASK_LOW_AW_1 0x4C1768
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_MASK_LOW_AW_2 0x4C176C
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_MASK_LOW_AW_3 0x4C1770
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_MASK_LOW_AW_4 0x4C1774
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_MASK_LOW_AW_5 0x4C1778
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_MASK_LOW_AW_6 0x4C177C
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_MASK_LOW_AW_7 0x4C1780
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_MASK_LOW_AW_8 0x4C1784
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_MASK_LOW_AW_9 0x4C1788
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_MASK_LOW_AW_10 0x4C178C
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_MASK_LOW_AW_11 0x4C1790
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_MASK_LOW_AW_12 0x4C1794
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_MASK_LOW_AW_13 0x4C1798
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_MASK_LOW_AW_14 0x4C179C
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_MASK_LOW_AW_15 0x4C17A0
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_MASK_HIGH_AW_0 0x4C17A4
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_MASK_HIGH_AW_1 0x4C17A8
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_MASK_HIGH_AW_2 0x4C17AC
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_MASK_HIGH_AW_3 0x4C17B0
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_MASK_HIGH_AW_4 0x4C17B4
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_MASK_HIGH_AW_5 0x4C17B8
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_MASK_HIGH_AW_6 0x4C17BC
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_MASK_HIGH_AW_7 0x4C17C0
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_MASK_HIGH_AW_8 0x4C17C4
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_MASK_HIGH_AW_9 0x4C17C8
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_MASK_HIGH_AW_10 0x4C17CC
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_MASK_HIGH_AW_11 0x4C17D0
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_MASK_HIGH_AW_12 0x4C17D4
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_MASK_HIGH_AW_13 0x4C17D8
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_MASK_HIGH_AW_14 0x4C17DC
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_MASK_HIGH_AW_15 0x4C17E0
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_BASE_LOW_AR_0 0x4C1824
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_BASE_LOW_AR_1 0x4C1828
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_BASE_LOW_AR_2 0x4C182C
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_BASE_LOW_AR_3 0x4C1830
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_BASE_LOW_AR_4 0x4C1834
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_BASE_LOW_AR_5 0x4C1838
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_BASE_LOW_AR_6 0x4C183C
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_BASE_LOW_AR_7 0x4C1840
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_BASE_LOW_AR_8 0x4C1844
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_BASE_LOW_AR_9 0x4C1848
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_BASE_LOW_AR_10 0x4C184C
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_BASE_LOW_AR_11 0x4C1850
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_BASE_LOW_AR_12 0x4C1854
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_BASE_LOW_AR_13 0x4C1858
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_BASE_LOW_AR_14 0x4C185C
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_BASE_LOW_AR_15 0x4C1860
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_BASE_HIGH_AR_0 0x4C1864
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_BASE_HIGH_AR_1 0x4C1868
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_BASE_HIGH_AR_2 0x4C186C
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_BASE_HIGH_AR_3 0x4C1870
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_BASE_HIGH_AR_4 0x4C1874
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_BASE_HIGH_AR_5 0x4C1878
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_BASE_HIGH_AR_6 0x4C187C
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_BASE_HIGH_AR_7 0x4C1880
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_BASE_HIGH_AR_8 0x4C1884
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_BASE_HIGH_AR_9 0x4C1888
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_BASE_HIGH_AR_10 0x4C188C
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_BASE_HIGH_AR_11 0x4C1890
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_BASE_HIGH_AR_12 0x4C1894
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_BASE_HIGH_AR_13 0x4C1898
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_BASE_HIGH_AR_14 0x4C189C
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_BASE_HIGH_AR_15 0x4C18A0
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_MASK_LOW_AR_0 0x4C18A4
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_MASK_LOW_AR_1 0x4C18A8
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_MASK_LOW_AR_2 0x4C18AC
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_MASK_LOW_AR_3 0x4C18B0
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_MASK_LOW_AR_4 0x4C18B4
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_MASK_LOW_AR_5 0x4C18B8
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_MASK_LOW_AR_6 0x4C18BC
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_MASK_LOW_AR_7 0x4C18C0
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_MASK_LOW_AR_8 0x4C18C4
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_MASK_LOW_AR_9 0x4C18C8
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_MASK_LOW_AR_10 0x4C18CC
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_MASK_LOW_AR_11 0x4C18D0
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_MASK_LOW_AR_12 0x4C18D4
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_MASK_LOW_AR_13 0x4C18D8
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_MASK_LOW_AR_14 0x4C18DC
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_MASK_LOW_AR_15 0x4C18E0
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_MASK_HIGH_AR_0 0x4C18E4
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_MASK_HIGH_AR_1 0x4C18E8
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_MASK_HIGH_AR_2 0x4C18EC
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_MASK_HIGH_AR_3 0x4C18F0
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_MASK_HIGH_AR_4 0x4C18F4
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_MASK_HIGH_AR_5 0x4C18F8
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_MASK_HIGH_AR_6 0x4C18FC
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_MASK_HIGH_AR_7 0x4C1900
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_MASK_HIGH_AR_8 0x4C1904
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_MASK_HIGH_AR_9 0x4C1908
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_MASK_HIGH_AR_10 0x4C190C
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_MASK_HIGH_AR_11 0x4C1910
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_MASK_HIGH_AR_12 0x4C1914
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_MASK_HIGH_AR_13 0x4C1918
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_MASK_HIGH_AR_14 0x4C191C
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_MASK_HIGH_AR_15 0x4C1920
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_BASE_LOW_AR_0 0x4C1924
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_BASE_LOW_AR_1 0x4C1928
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_BASE_LOW_AR_2 0x4C192C
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_BASE_LOW_AR_3 0x4C1930
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_BASE_LOW_AR_4 0x4C1934
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_BASE_LOW_AR_5 0x4C1938
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_BASE_LOW_AR_6 0x4C193C
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_BASE_LOW_AR_7 0x4C1940
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_BASE_LOW_AR_8 0x4C1944
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_BASE_LOW_AR_9 0x4C1948
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_BASE_LOW_AR_10 0x4C194C
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_BASE_LOW_AR_11 0x4C1950
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_BASE_LOW_AR_12 0x4C1954
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_BASE_LOW_AR_13 0x4C1958
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_BASE_LOW_AR_14 0x4C195C
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_BASE_LOW_AR_15 0x4C1960
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_BASE_HIGH_AR_0 0x4C1964
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_BASE_HIGH_AR_1 0x4C1968
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_BASE_HIGH_AR_2 0x4C196C
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_BASE_HIGH_AR_3 0x4C1970
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_BASE_HIGH_AR_4 0x4C1974
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_BASE_HIGH_AR_5 0x4C1978
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_BASE_HIGH_AR_6 0x4C197C
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_BASE_HIGH_AR_7 0x4C1980
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_BASE_HIGH_AR_8 0x4C1984
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_BASE_HIGH_AR_9 0x4C1988
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_BASE_HIGH_AR_10 0x4C198C
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_BASE_HIGH_AR_11 0x4C1990
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_BASE_HIGH_AR_12 0x4C1994
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_BASE_HIGH_AR_13 0x4C1998
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_BASE_HIGH_AR_14 0x4C199C
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_BASE_HIGH_AR_15 0x4C19A0
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_MASK_LOW_AR_0 0x4C19A4
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_MASK_LOW_AR_1 0x4C19A8
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_MASK_LOW_AR_2 0x4C19AC
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_MASK_LOW_AR_3 0x4C19B0
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_MASK_LOW_AR_4 0x4C19B4
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_MASK_LOW_AR_5 0x4C19B8
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_MASK_LOW_AR_6 0x4C19BC
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_MASK_LOW_AR_7 0x4C19C0
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_MASK_LOW_AR_8 0x4C19C4
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_MASK_LOW_AR_9 0x4C19C8
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_MASK_LOW_AR_10 0x4C19CC
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_MASK_LOW_AR_11 0x4C19D0
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_MASK_LOW_AR_12 0x4C19D4
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_MASK_LOW_AR_13 0x4C19D8
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_MASK_LOW_AR_14 0x4C19DC
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_MASK_LOW_AR_15 0x4C19E0
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_MASK_HIGH_AR_0 0x4C19E4
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_MASK_HIGH_AR_1 0x4C19E8
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_MASK_HIGH_AR_2 0x4C19EC
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_MASK_HIGH_AR_3 0x4C19F0
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_MASK_HIGH_AR_4 0x4C19F4
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_MASK_HIGH_AR_5 0x4C19F8
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_MASK_HIGH_AR_6 0x4C19FC
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_MASK_HIGH_AR_7 0x4C1A00
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_MASK_HIGH_AR_8 0x4C1A04
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_MASK_HIGH_AR_9 0x4C1A08
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_MASK_HIGH_AR_10 0x4C1A0C
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_MASK_HIGH_AR_11 0x4C1A10
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_MASK_HIGH_AR_12 0x4C1A14
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_MASK_HIGH_AR_13 0x4C1A18
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_MASK_HIGH_AR_14 0x4C1A1C
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_MASK_HIGH_AR_15 0x4C1A20
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_HIT_AW 0x4C1A64
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_SEC_HIT_AR 0x4C1A68
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_HIT_AW 0x4C1A6C
#define mmDMA_IF_W_N_DOWN_CH0_RANGE_PRIV_HIT_AR 0x4C1A70
#define mmDMA_IF_W_N_DOWN_CH0_RGL_CFG 0x4C1B64
#define mmDMA_IF_W_N_DOWN_CH0_RGL_SHIFT 0x4C1B68
#define mmDMA_IF_W_N_DOWN_CH0_RGL_EXPECTED_LAT_0 0x4C1B6C
#define mmDMA_IF_W_N_DOWN_CH0_RGL_EXPECTED_LAT_1 0x4C1B70
#define mmDMA_IF_W_N_DOWN_CH0_RGL_EXPECTED_LAT_2 0x4C1B74
#define mmDMA_IF_W_N_DOWN_CH0_RGL_EXPECTED_LAT_3 0x4C1B78
#define mmDMA_IF_W_N_DOWN_CH0_RGL_EXPECTED_LAT_4 0x4C1B7C
#define mmDMA_IF_W_N_DOWN_CH0_RGL_EXPECTED_LAT_5 0x4C1B80
#define mmDMA_IF_W_N_DOWN_CH0_RGL_EXPECTED_LAT_6 0x4C1B84
#define mmDMA_IF_W_N_DOWN_CH0_RGL_EXPECTED_LAT_7 0x4C1B88
#define mmDMA_IF_W_N_DOWN_CH0_RGL_TOKEN_0 0x4C1BAC
#define mmDMA_IF_W_N_DOWN_CH0_RGL_TOKEN_1 0x4C1BB0
#define mmDMA_IF_W_N_DOWN_CH0_RGL_TOKEN_2 0x4C1BB4
#define mmDMA_IF_W_N_DOWN_CH0_RGL_TOKEN_3 0x4C1BB8
#define mmDMA_IF_W_N_DOWN_CH0_RGL_TOKEN_4 0x4C1BBC
#define mmDMA_IF_W_N_DOWN_CH0_RGL_TOKEN_5 0x4C1BC0
#define mmDMA_IF_W_N_DOWN_CH0_RGL_TOKEN_6 0x4C1BC4
#define mmDMA_IF_W_N_DOWN_CH0_RGL_TOKEN_7 0x4C1BC8
#define mmDMA_IF_W_N_DOWN_CH0_RGL_BANK_ID_0 0x4C1BEC
#define mmDMA_IF_W_N_DOWN_CH0_RGL_BANK_ID_1 0x4C1BF0
#define mmDMA_IF_W_N_DOWN_CH0_RGL_BANK_ID_2 0x4C1BF4
#define mmDMA_IF_W_N_DOWN_CH0_RGL_BANK_ID_3 0x4C1BF8
#define mmDMA_IF_W_N_DOWN_CH0_RGL_BANK_ID_4 0x4C1BFC
#define mmDMA_IF_W_N_DOWN_CH0_RGL_BANK_ID_5 0x4C1C00
#define mmDMA_IF_W_N_DOWN_CH0_RGL_BANK_ID_6 0x4C1C04
#define mmDMA_IF_W_N_DOWN_CH0_RGL_BANK_ID_7 0x4C1C08
#define mmDMA_IF_W_N_DOWN_CH0_RGL_WDT 0x4C1C2C
#define mmDMA_IF_W_N_DOWN_CH0_E2E_AR_HBM0_CH0_CTR_WRAP 0x4C1C30
#define mmDMA_IF_W_N_DOWN_CH0_E2E_AR_HBM0_CH1_CTR_WRAP 0x4C1C34
#define mmDMA_IF_W_N_DOWN_CH0_E2E_AR_HBM1_CH0_CTR_WRAP 0x4C1C38
#define mmDMA_IF_W_N_DOWN_CH0_E2E_AR_HBM1_CH1_CTR_WRAP 0x4C1C3C
#define mmDMA_IF_W_N_DOWN_CH0_E2E_AR_HBM2_CH0_CTR_WRAP 0x4C1C40
#define mmDMA_IF_W_N_DOWN_CH0_E2E_AR_HBM2_CH1_CTR_WRAP 0x4C1C44
#define mmDMA_IF_W_N_DOWN_CH0_E2E_AR_HBM3_CH0_CTR_WRAP 0x4C1C48
#define mmDMA_IF_W_N_DOWN_CH0_E2E_AR_HBM3_CH1_CTR_WRAP 0x4C1C4C
#define mmDMA_IF_W_N_DOWN_CH0_E2E_AR_HBM0_CH0_CTR_CNT 0x4C1C50
#define mmDMA_IF_W_N_DOWN_CH0_E2E_AR_HBM0_CH1_CTR_CNT 0x4C1C54
#define mmDMA_IF_W_N_DOWN_CH0_E2E_AR_HBM1_CH0_CTR_CNT 0x4C1C58
#define mmDMA_IF_W_N_DOWN_CH0_E2E_AR_HBM1_CH1_CTR_CNT 0x4C1C5C
#define mmDMA_IF_W_N_DOWN_CH0_E2E_AR_HBM2_CH0_CTR_CNT 0x4C1C60
#define mmDMA_IF_W_N_DOWN_CH0_E2E_AR_HBM2_CH1_CTR_CNT 0x4C1C64
#define mmDMA_IF_W_N_DOWN_CH0_E2E_AR_HBM3_CH0_CTR_CNT 0x4C1C68
#define mmDMA_IF_W_N_DOWN_CH0_E2E_AR_HBM3_CH1_CTR_CNT 0x4C1C6C
#define mmDMA_IF_W_N_DOWN_CH0_E2E_AW_HBM0_CH0_CTR_WRAP 0x4C1C70
#define mmDMA_IF_W_N_DOWN_CH0_E2E_AW_HBM0_CH1_CTR_WRAP 0x4C1C74
#define mmDMA_IF_W_N_DOWN_CH0_E2E_AW_HBM1_CH0_CTR_WRAP 0x4C1C78
#define mmDMA_IF_W_N_DOWN_CH0_E2E_AW_HBM1_CH1_CTR_WRAP 0x4C1C7C
#define mmDMA_IF_W_N_DOWN_CH0_E2E_AW_HBM2_CH0_CTR_WRAP 0x4C1C80
#define mmDMA_IF_W_N_DOWN_CH0_E2E_AW_HBM2_CH1_CTR_WRAP 0x4C1C84
#define mmDMA_IF_W_N_DOWN_CH0_E2E_AW_HBM3_CH0_CTR_WRAP 0x4C1C88
#define mmDMA_IF_W_N_DOWN_CH0_E2E_AW_HBM3_CH1_CTR_WRAP 0x4C1C8C
#define mmDMA_IF_W_N_DOWN_CH0_E2E_AW_HBM0_CH0_CTR_CNT 0x4C1C90
#define mmDMA_IF_W_N_DOWN_CH0_E2E_AW_HBM0_CH1_CTR_CNT 0x4C1C94
#define mmDMA_IF_W_N_DOWN_CH0_E2E_AW_HBM1_CH0_CTR_CNT 0x4C1C98
#define mmDMA_IF_W_N_DOWN_CH0_E2E_AW_HBM1_CH1_CTR_CNT 0x4C1C9C
#define mmDMA_IF_W_N_DOWN_CH0_E2E_AW_HBM2_CH0_CTR_CNT 0x4C1CA0
#define mmDMA_IF_W_N_DOWN_CH0_E2E_AW_HBM2_CH1_CTR_CNT 0x4C1CA4
#define mmDMA_IF_W_N_DOWN_CH0_E2E_AW_HBM3_CH0_CTR_CNT 0x4C1CA8
#define mmDMA_IF_W_N_DOWN_CH0_E2E_AW_HBM3_CH1_CTR_CNT 0x4C1CAC
#define mmDMA_IF_W_N_DOWN_CH0_NL_HBM_PC_SEL_0 0x4C1CB0
#define mmDMA_IF_W_N_DOWN_CH0_NL_HBM_PC_SEL_1 0x4C1CB4
#define mmDMA_IF_W_N_DOWN_CH0_NL_HBM_PC_SEL_2 0x4C1CB8
#define mmDMA_IF_W_N_DOWN_CH0_NL_HBM_PC_SEL_3 0x4C1CBC
#endif /* ASIC_REG_DMA_IF_W_N_DOWN_CH0_REGS_H_ */