# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/media/xilinx/xlnx,csi2rxss.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Xilinx MIPI CSI-2 Receiver Subsystem maintainers: - Vishal Sagar <vishal.sagar@amd.com> description: | The Xilinx MIPI CSI-2 Receiver Subsystem is used to capture MIPI CSI-2 traffic from compliant camera sensors and send the output as AXI4 Stream video data for image processing. The subsystem consists of a MIPI D-PHY in slave mode which captures the data packets. This is passed along the MIPI CSI-2 Rx IP which extracts the packet data. The optional Video Format Bridge (VFB) converts this data to AXI4 Stream video data. For more details, please refer to PG232 Xilinx MIPI CSI-2 Receiver Subsystem. Please note that this bindings includes only the MIPI CSI-2 Rx controller and Video Format Bridge and not D-PHY. properties: compatible: items: - enum: - xlnx,mipi-csi2-rx-subsystem-5.0 reg: maxItems: 1 interrupts: maxItems: 1 clocks: description: List of clock specifiers items: - description: AXI Lite clock - description: Video clock clock-names: items: - const: lite_aclk - const: video_aclk xlnx,csi-pxl-format: description: | This denotes the CSI Data type selected in hw design. Packets other than this data type (except for RAW8 and User defined data types) will be filtered out. Possible values are as below - 0x1e - YUV4228B 0x1f - YUV42210B 0x20 - RGB444 0x21 - RGB555 0x22 - RGB565 0x23 - RGB666 0x24 - RGB888 0x28 - RAW6 0x29 - RAW7 0x2a - RAW8 0x2b - RAW10 0x2c - RAW12 0x2d - RAW14 0x2e - RAW16 0x2f - RAW20 $ref: /schemas/types.yaml#/definitions/uint32 oneOf: - minimum: 0x1e maximum: 0x24 - minimum: 0x28 maximum: 0x2f xlnx,vfb: type: boolean description: Present when Video Format Bridge is enabled in IP configuration xlnx,en-csi-v2-0: type: boolean description: Present if CSI v2 is enabled in IP configuration. xlnx,en-vcx: type: boolean description: | When present, there are maximum 16 virtual channels, else only 4. xlnx,en-active-lanes: type: boolean description: | Present if the number of active lanes can be re-configured at runtime in the Protocol Configuration Register. Otherwise all lanes, as set in IP configuration, are always active. video-reset-gpios: description: Optional specifier for a GPIO that asserts video_aresetn. maxItems: 1 ports: $ref: /schemas/graph.yaml#/properties/ports properties: port@0: $ref: /schemas/graph.yaml#/$defs/port-base description: | Input / sink port node, single endpoint describing the CSI-2 transmitter. properties: endpoint: $ref: /schemas/media/video-interfaces.yaml# unevaluatedProperties: false properties: data-lanes: description: | This is required only in the sink port 0 endpoint which connects to MIPI CSI-2 source like sensor. The possible values are - 1 - For 1 lane enabled in IP. 1 2 - For 2 lanes enabled in IP. 1 2 3 - For 3 lanes enabled in IP. 1 2 3 4 - For 4 lanes enabled in IP. items: - const: 1 - const: 2 - const: 3 - const: 4 required: - data-lanes unevaluatedProperties: false port@1: $ref: /schemas/graph.yaml#/properties/port description: | Output / source port node, endpoint describing modules connected the CSI-2 receiver. required: - compatible - reg - interrupts - clocks - clock-names - ports allOf: - if: required: - xlnx,vfb then: required: - xlnx,csi-pxl-format else: properties: xlnx,csi-pxl-format: false - if: not: required: - xlnx,en-csi-v2-0 then: properties: xlnx,en-vcx: false additionalProperties: false examples: - | #include <dt-bindings/gpio/gpio.h> xcsi2rxss_1: csi2rx@a0020000 { compatible = "xlnx,mipi-csi2-rx-subsystem-5.0"; reg = <0xa0020000 0x10000>; interrupt-parent = <&gic>; interrupts = <0 95 4>; xlnx,csi-pxl-format = <0x2a>; xlnx,vfb; xlnx,en-active-lanes; xlnx,en-csi-v2-0; xlnx,en-vcx; clock-names = "lite_aclk", "video_aclk"; clocks = <&misc_clk_0>, <&misc_clk_1>; video-reset-gpios = <&gpio 86 GPIO_ACTIVE_LOW>; ports { #address-cells = <1>; #size-cells = <0>; port@0 { /* Sink port */ reg = <0>; csiss_in: endpoint { data-lanes = <1 2 3 4>; /* MIPI CSI-2 Camera handle */ remote-endpoint = <&camera_out>; }; }; port@1 { /* Source port */ reg = <1>; csiss_out: endpoint { remote-endpoint = <&vproc_in>; }; }; }; }; ...