# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/sound/microchip,sama7g5-i2smcc.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Microchip I2S Multi-Channel Controller maintainers: - Codrin Ciubotariu <codrin.ciubotariu@microchip.com> description: The I2SMCC complies with the Inter-IC Sound (I2S) bus specification and supports a Time Division Multiplexed (TDM) interface with external multi-channel audio codecs. It consists of a receiver, a transmitter and a common clock generator that can be enabled separately to provide Adapter, Client or Controller modes with receiver and/or transmitter active. On later I2SMCC versions (starting with Microchip's SAMA7G5) I2S multi-channel is supported by using multiple data pins, output and input, without TDM. properties: "#sound-dai-cells": const: 0 compatible: enum: - microchip,sam9x60-i2smcc - microchip,sama7g5-i2smcc reg: maxItems: 1 interrupts: maxItems: 1 clocks: items: - description: Peripheral Bus Clock - description: Generic Clock (Optional). Should be set mostly when Master Mode is required. minItems: 1 clock-names: items: - const: pclk - const: gclk minItems: 1 dmas: items: - description: TX DMA Channel - description: RX DMA Channel dma-names: items: - const: tx - const: rx microchip,tdm-data-pair: description: Represents the DIN/DOUT pair pins that are used to receive/send TDM data. It is optional and it is only needed if the controller uses the TDM mode. $ref: /schemas/types.yaml#/definitions/uint8 enum: [0, 1, 2, 3] default: 0 allOf: - $ref: dai-common.yaml# - if: properties: compatible: const: microchip,sam9x60-i2smcc then: properties: microchip,tdm-data-pair: false required: - "#sound-dai-cells" - compatible - reg - interrupts - clocks - clock-names - dmas - dma-names unevaluatedProperties: false examples: - | #include <dt-bindings/dma/at91.h> #include <dt-bindings/interrupt-controller/arm-gic.h> i2s@f001c000 { #sound-dai-cells = <0>; compatible = "microchip,sam9x60-i2smcc"; reg = <0xf001c000 0x100>; interrupts = <34 IRQ_TYPE_LEVEL_HIGH 7>; dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(36))>, <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(37))>; dma-names = "tx", "rx"; clocks = <&i2s_clk>, <&i2s_gclk>; clock-names = "pclk", "gclk"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2s_default>; };