Symbol: r0

macro public

Defined...

• arch/x86/crypto/poly1305-avx2-x86_64.S:27:9-27:21: #define r0 0x00(%rdx)
• arch/x86/crypto/poly1305-sse2-x86_64.S:25:9-25:21: #define r0 0x00(%rdx)
• drivers/block/paride/paride.h:105:9-105:48: #define r0() (in_p(0) & 0xff)

function parameter

Defined...

• crypto/serpent_generic.c:233:44-233:48: static noinline void __serpent_setkey_sbox(u32 r0, u32 r1, u32 r2,

variable

Defined...

• crypto/poly1305_generic.c:95:2-95:6: u32 r0, r1, r2, r3, r4;
• crypto/serpent_generic.c:279:2-279:6: u32 r0, r1, r2, r3, r4;
• crypto/serpent_generic.c:457:2-457:6: u32 r0, r1, r2, r3, r4;
• crypto/serpent_generic.c:522:2-522:6: u32 r0, r1, r2, r3, r4;
• crypto/streebog_generic.c:915:2-915:6: u64 r0, r1, r2, r3, r4, r5, r6, r7;
• drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c:228:2-228:2: WREG32_RLC(SOC15_REG_OFFSET(GC, 0, mmSH_MEM_CONFIG), sh_mem_config);
• drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c:229:2-229:2: WREG32_RLC(SOC15_REG_OFFSET(GC, 0, mmSH_MEM_BASES), sh_mem_bases);
• drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c:372:3-372:3: WREG32_RLC(SOC15_REG_OFFSET(GC, 0, mmRLC_CP_SCHEDULERS), value);
• drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c:381:3-381:3: WREG32_RLC(reg, mqd_hqd[reg - hqd_base]);
• drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c:387:2-387:2: WREG32_RLC(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL), data);
• drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c:416:3-416:3: WREG32_RLC(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_PQ_WPTR_LO),
• drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c:418:3-418:3: WREG32_RLC(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_PQ_WPTR_HI),
• drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c:420:3-420:3: WREG32_RLC(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_PQ_WPTR_POLL_ADDR),
• drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c:422:3-422:3: WREG32_RLC(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_PQ_WPTR_POLL_ADDR_HI),
• drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c:429:2-429:2: WREG32_RLC(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_EOP_RPTR),
• drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c:434:2-434:2: WREG32_RLC(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_ACTIVE), data);
• drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c:636:3-636:3: WREG32_FIELD15_RLC(GC, 0, RLC_CP_SCHEDULERS, scheduler1, 0);
• drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c:650:2-650:2: WREG32_RLC(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_DEQUEUE_REQUEST), type);
• drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:1916:3-1916:3: WREG32_SOC15_RLC(GC, 0, mmSH_MEM_CONFIG, sh_mem_config);
• drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:1917:3-1917:3: WREG32_SOC15_RLC(GC, 0, mmSH_MEM_BASES, sh_mem_bases);
• drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:1937:2-1937:2: WREG32_FIELD15_RLC(GC, 0, GRBM_CNTL, READ_TIMEOUT, 0xff);
• drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:1956:4-1956:4: WREG32_SOC15_RLC(GC, 0, mmSH_MEM_CONFIG, tmp);
• drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:1957:4-1957:4: WREG32_SOC15_RLC(GC, 0, mmSH_MEM_BASES, 0);
• drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:1963:4-1963:4: WREG32_SOC15_RLC(GC, 0, mmSH_MEM_CONFIG, tmp);
• drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:1968:4-1968:4: WREG32_SOC15_RLC(GC, 0, mmSH_MEM_BASES, tmp);
• drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:2032:2-2032:2: WREG32_RLC(SOC15_REG_OFFSET(GC, 0, mmRLC_CSIB_ADDR_HI),
• drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:2034:2-2034:2: WREG32_RLC(SOC15_REG_OFFSET(GC, 0, mmRLC_CSIB_ADDR_LO),
• drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:2036:2-2036:2: WREG32_RLC(SOC15_REG_OFFSET(GC, 0, mmRLC_CSIB_LENGTH),
• drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:2505:2-2505:2: WREG32_SOC15_RLC(GC, 0, mmCP_ME_CNTL, tmp);
• drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:2703:3-2703:3: WREG32_SOC15_RLC(GC, 0, mmCP_MEC_CNTL, 0);
• drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:2705:3-2705:3: WREG32_SOC15_RLC(GC, 0, mmCP_MEC_CNTL,
• drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:2766:2-2766:2: WREG32_SOC15_RLC(GC, 0, mmRLC_CP_SCHEDULERS, tmp);
• drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:2768:2-2768:2: WREG32_SOC15_RLC(GC, 0, mmRLC_CP_SCHEDULERS, tmp);
• drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:2986:2-2986:2: WREG32_SOC15_RLC(GC, 0, mmCP_HQD_EOP_BASE_ADDR,
• drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:2988:2-2988:2: WREG32_SOC15_RLC(GC, 0, mmCP_HQD_EOP_BASE_ADDR_HI,
• drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:2992:2-2992:2: WREG32_SOC15_RLC(GC, 0, mmCP_HQD_EOP_CONTROL,
• drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:2996:2-2996:2: WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL,
• drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:3001:3-3001:3: WREG32_SOC15_RLC(GC, 0, mmCP_HQD_DEQUEUE_REQUEST, 1);
• drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:3007:3-3007:3: WREG32_SOC15_RLC(GC, 0, mmCP_HQD_DEQUEUE_REQUEST,
• drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:3009:3-3009:3: WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_RPTR,
• drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:3011:3-3011:3: WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_WPTR_LO,
• drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:3013:3-3013:3: WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_WPTR_HI,
• drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:3018:2-3018:2: WREG32_SOC15_RLC(GC, 0, mmCP_MQD_BASE_ADDR,
• drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:3020:2-3020:2: WREG32_SOC15_RLC(GC, 0, mmCP_MQD_BASE_ADDR_HI,
• drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:3024:2-3024:2: WREG32_SOC15_RLC(GC, 0, mmCP_MQD_CONTROL,
• drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:3028:2-3028:2: WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_BASE,
• drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:3030:2-3030:2: WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_BASE_HI,
• drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:3034:2-3034:2: WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_CONTROL,
• drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:3038:2-3038:2: WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_RPTR_REPORT_ADDR,
• drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:3040:2-3040:2: WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_RPTR_REPORT_ADDR_HI,
• drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:3044:2-3044:2: WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_WPTR_POLL_ADDR,
• drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:3046:2-3046:2: WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_WPTR_POLL_ADDR_HI,
• drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:3057:2-3057:2: WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL,
• drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:3061:2-3061:2: WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_WPTR_LO,
• drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:3063:2-3063:2: WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_WPTR_HI,
• drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:3067:2-3067:2: WREG32_SOC15_RLC(GC, 0, mmCP_HQD_VMID, mqd->cp_hqd_vmid);
• drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:3069:2-3069:2: WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PERSISTENT_STATE,
• drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:3073:2-3073:2: WREG32_SOC15_RLC(GC, 0, mmCP_HQD_ACTIVE,
• drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:3090:3-3090:3: WREG32_SOC15_RLC(GC, 0, mmCP_HQD_DEQUEUE_REQUEST, 1);
• drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:3102:4-3102:4: WREG32_SOC15_RLC(GC, 0, mmCP_HQD_ACTIVE, 0);
• drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:3105:3-3105:3: WREG32_SOC15_RLC(GC, 0, mmCP_HQD_DEQUEUE_REQUEST,
• drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:3109:2-3109:2: WREG32_SOC15_RLC(GC, 0, mmCP_HQD_IQ_TIMER, 0);
• drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:3110:2-3110:2: WREG32_SOC15_RLC(GC, 0, mmCP_HQD_IB_CONTROL, 0);
• drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:3111:2-3111:2: WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PERSISTENT_STATE, 0);
• drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:3112:2-3112:2: WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL, 0x40000000);
• drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:3113:2-3113:2: WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL, 0);
• drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:3114:2-3114:2: WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_RPTR, 0);
• drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:3115:2-3115:2: WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_WPTR_HI, 0);
• drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:3116:2-3116:2: WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_WPTR_LO, 0);
• drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:4629:2-4629:2: WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PIPE_PRIORITY, pipe_priority);
• drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:4630:2-4630:2: WREG32_SOC15_RLC(GC, 0, mmCP_HQD_QUEUE_PRIORITY, queue_priority);
• drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c:74:2-74:2: WREG32_SOC15_RLC(GC, 0, mmMC_VM_AGP_BASE, 0);
• drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c:75:2-75:2: WREG32_SOC15_RLC(GC, 0, mmMC_VM_AGP_BOT, adev->gmc.agp_start >> 24);
• drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c:76:2-76:2: WREG32_SOC15_RLC(GC, 0, mmMC_VM_AGP_TOP, adev->gmc.agp_end >> 24);
• drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c:79:2-79:2: WREG32_SOC15_RLC(GC, 0, mmMC_VM_SYSTEM_APERTURE_LOW_ADDR,
• drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c:89:3-89:3: WREG32_SOC15_RLC(GC, 0, mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR,
• drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c:93:3-93:3: WREG32_SOC15_RLC(GC, 0, mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR,
• drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c:132:2-132:2: WREG32_SOC15_RLC(GC, 0, mmMC_VM_MX_L1_TLB_CNTL, tmp);
• drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c:149:2-149:2: WREG32_SOC15_RLC(GC, 0, mmVM_L2_CNTL, tmp);
• drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c:154:2-154:2: WREG32_SOC15_RLC(GC, 0, mmVM_L2_CNTL2, tmp);
• drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c:166:2-166:2: WREG32_SOC15_RLC(GC, 0, mmVM_L2_CNTL3, tmp);
• drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c:171:2-171:2: WREG32_SOC15_RLC(GC, 0, mmVM_L2_CNTL4, tmp);
• drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c:271:3-271:3: WREG32_SOC15_RLC(GC, 0, mmMC_VM_FB_LOCATION_BASE,
• drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c:273:3-273:3: WREG32_SOC15_RLC(GC, 0, mmMC_VM_FB_LOCATION_TOP,
• drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c:307:2-307:2: WREG32_SOC15_RLC(GC, 0, mmMC_VM_MX_L1_TLB_CNTL, tmp);
• drivers/gpu/drm/amd/amdgpu/soc15.c:389:4-389:4: WREG32_RLC(reg, tmp);
• drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv50.c:510:2-510:6: u32 r0, r4, rt, rblock_size;
• drivers/media/dvb-frontends/stv090x.c:1655:2-1655:17: u8 r3, r2, r1, r0;
• kernel/bpf/verifier.c:3821:2-3821:24: struct bpf_reg_state *r0;
• sound/soc/codecs/rt1011.c:2016:2-2016:37: unsigned int value, count = 0, r0[3];