Symbol: _a

function parameter

Defined...

• arch/x86/kernel/unwind_orc.c:190:27-190:33: static void orc_sort_swap(void *_a, void *_b, int size)
• arch/x86/kernel/unwind_orc.c:210:25-210:37: static int orc_sort_cmp(const void *_a, const void *_b)
• drivers/acpi/nfit/core.c:1186:37-1186:55: static int nfit_mem_cmp(void *priv, struct list_head *_a, struct list_head *_b)
• drivers/gpu/drm/i915/gt/selftest_engine_heartbeat.c:162:20-162:32: static int cmp_u32(const void *_a, const void *_b)
• drivers/gpu/drm/i915/intel_runtime_pm.c:159:22-159:34: static int cmphandle(const void *_a, const void *_b)
• drivers/net/wireless/intersil/p54/eeprom.c:104:33-104:45: static int p54_compare_channels(const void *_a,
• drivers/net/wireless/intersil/p54/eeprom.c:113:33-113:45: static int p54_compare_rssichan(const void *_a,
• include/linux/netfilter/x_tables.h:402:52-402:64: static inline unsigned long ifname_compare_aligned(const char *_a,
• kernel/groups.c:81:20-81:32: static int gid_cmp(const void *_a, const void *_b)
• net/ipv4/netfilter/arp_tables.c:64:37-64:49: static unsigned long ifname_compare(const char *_a, const char *_b, const char *_mask)
• sound/soc/codecs/arizona.c:2708:51-2708:58: static bool arizona_eq_filter_unstable(bool mode, __be16 _a, __be16 _b)
• sound/soc/codecs/madera.c:4605:50-4605:57: static bool madera_eq_filter_unstable(bool mode, __be16 _a, __be16 _b)

variable

Defined...

• drivers/base/regmap/regcache.c:637:2-637:33: const struct reg_default *_a = a;
• drivers/gpu/drm/i915/gt/intel_engine_cs.c:916:2-916:2: intel_uncore_write_fw(uncore, mode, _MASKED_BIT_ENABLE(STOP_RING));
• drivers/gpu/drm/i915/gt/intel_lrc.c:2859:10-2859:10: mode = _MASKED_BIT_ENABLE(GEN11_GFX_DISABLE_LEGACY_MODE);
• drivers/gpu/drm/i915/gt/intel_lrc.c:2861:10-2861:10: mode = _MASKED_BIT_ENABLE(GFX_RUN_LIST_ENABLE);
• drivers/gpu/drm/i915/gt/intel_lrc.c:3906:3-3906:3: _MASKED_BIT_ENABLE(CTX_CTRL_INHIBIT_SYN_CTX_SWITCH);
• drivers/gpu/drm/i915/gt/intel_lrc.c:4039:4-4039:4: _MASKED_BIT_ENABLE(CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT);
• drivers/gpu/drm/i915/gt/intel_rc6.c:361:6-361:6: _MASKED_BIT_ENABLE(VLV_COUNT_RANGE_HIGH |
• drivers/gpu/drm/i915/gt/intel_rc6.c:386:6-386:6: _MASKED_BIT_ENABLE(VLV_COUNT_RANGE_HIGH |
• drivers/gpu/drm/i915/gt/intel_rc6.c:686:6-686:6: _MASKED_BIT_ENABLE(VLV_COUNT_RANGE_HIGH));
• drivers/gpu/drm/i915/gt/intel_rc6.c:696:7-696:7: _MASKED_BIT_ENABLE(VLV_COUNT_RANGE_HIGH));
• drivers/gpu/drm/i915/gt/intel_reset.c:486:2-486:2: intel_uncore_write_fw(uncore, reg, _MASKED_BIT_ENABLE(request));
• drivers/gpu/drm/i915/gt/intel_ring_submission.c:574:2-574:2: ENGINE_WRITE(engine, RING_INSTPM,
• drivers/gpu/drm/i915/gt/intel_ring_submission.c:598:3-598:3: ENGINE_WRITE(engine,
• drivers/gpu/drm/i915/gt/intel_ring_submission.c:858:3-858:3: I915_WRITE(ECOSKPD,
• drivers/gpu/drm/i915/gt/intel_ring_submission.c:863:3-863:3: I915_WRITE(MI_MODE, _MASKED_BIT_ENABLE(VS_TIMER_DISPATCH));
• drivers/gpu/drm/i915/gt/intel_ring_submission.c:872:3-872:3: I915_WRITE(MI_MODE, _MASKED_BIT_ENABLE(ASYNC_FLIP_PERF_DISABLE));
• drivers/gpu/drm/i915/gt/intel_ring_submission.c:877:3-877:3: I915_WRITE(GFX_MODE,
• drivers/gpu/drm/i915/gt/intel_ring_submission.c:882:3-882:3: I915_WRITE(GFX_MODE_GEN7,
• drivers/gpu/drm/i915/gt/intel_ring_submission.c:897:3-897:3: I915_WRITE(INSTPM, _MASKED_BIT_ENABLE(INSTPM_FORCE_ORDERING));
• drivers/gpu/drm/i915/gt/intel_ring_submission.c:1445:13-1445:13: *cs++ = _MASKED_BIT_ENABLE(
• drivers/gpu/drm/i915/gt/intel_ring_submission.c:1676:2-1676:2: intel_uncore_write_fw(uncore, GEN6_BSD_SLEEP_PSMI_CONTROL,
• drivers/gpu/drm/i915/gt/intel_workarounds.c:166:36-166:36: wa_write_masked_or(wal, reg, val, _MASKED_BIT_ENABLE(val));
• drivers/gpu/drm/i915/gt/intel_workarounds.c:193:2-193:2: WA_SET_BIT_MASKED(INSTPM, INSTPM_FORCE_ORDERING);
• drivers/gpu/drm/i915/gt/intel_workarounds.c:196:2-196:2: WA_SET_BIT_MASKED(MI_MODE, ASYNC_FLIP_PERF_DISABLE);
• drivers/gpu/drm/i915/gt/intel_workarounds.c:199:2-199:2: WA_SET_BIT_MASKED(GEN8_ROW_CHICKEN,
• drivers/gpu/drm/i915/gt/intel_workarounds.c:208:2-208:2: WA_SET_BIT_MASKED(HDC_CHICKEN0,
• drivers/gpu/drm/i915/gt/intel_workarounds.c:223:2-223:2: WA_SET_BIT_MASKED(CACHE_MODE_1, GEN8_4x4_STC_OPTIMIZATION_DISABLE);
• drivers/gpu/drm/i915/gt/intel_workarounds.c:246:2-246:2: WA_SET_BIT_MASKED(GEN8_ROW_CHICKEN, STALL_DOP_GATING_DISABLE);
• drivers/gpu/drm/i915/gt/intel_workarounds.c:253:2-253:2: WA_SET_BIT_MASKED(GEN7_ROW_CHICKEN2,
• drivers/gpu/drm/i915/gt/intel_workarounds.c:256:2-256:2: WA_SET_BIT_MASKED(HALF_SLICE_CHICKEN3,
• drivers/gpu/drm/i915/gt/intel_workarounds.c:259:2-259:2: WA_SET_BIT_MASKED(HDC_CHICKEN0,
• drivers/gpu/drm/i915/gt/intel_workarounds.c:272:2-272:2: WA_SET_BIT_MASKED(GEN8_ROW_CHICKEN, STALL_DOP_GATING_DISABLE);
• drivers/gpu/drm/i915/gt/intel_workarounds.c:275:2-275:2: WA_SET_BIT_MASKED(HIZ_CHICKEN, CHV_HZ_8X8_MODE_IN_1X);
• drivers/gpu/drm/i915/gt/intel_workarounds.c:289:3-289:3: WA_SET_BIT_MASKED(COMMON_SLICE_CHICKEN2,
• drivers/gpu/drm/i915/gt/intel_workarounds.c:291:3-291:3: WA_SET_BIT_MASKED(GEN9_HALF_SLICE_CHICKEN7,
• drivers/gpu/drm/i915/gt/intel_workarounds.c:297:2-297:2: WA_SET_BIT_MASKED(GEN8_ROW_CHICKEN,
• drivers/gpu/drm/i915/gt/intel_workarounds.c:303:2-303:2: WA_SET_BIT_MASKED(GEN9_HALF_SLICE_CHICKEN7,
• drivers/gpu/drm/i915/gt/intel_workarounds.c:309:2-309:2: WA_SET_BIT_MASKED(CACHE_MODE_1,
• drivers/gpu/drm/i915/gt/intel_workarounds.c:318:2-318:2: WA_SET_BIT_MASKED(HDC_CHICKEN0,
• drivers/gpu/drm/i915/gt/intel_workarounds.c:336:2-336:2: WA_SET_BIT_MASKED(HDC_CHICKEN0,
• drivers/gpu/drm/i915/gt/intel_workarounds.c:341:3-341:3: WA_SET_BIT_MASKED(HALF_SLICE_CHICKEN3,
• drivers/gpu/drm/i915/gt/intel_workarounds.c:345:2-345:2: WA_SET_BIT_MASKED(HALF_SLICE_CHICKEN2, GEN8_ST_PO_DISABLE);
• drivers/gpu/drm/i915/gt/intel_workarounds.c:368:3-368:3: WA_SET_BIT_MASKED(GEN9_WM_CHICKEN3, GEN9_FACTOR_IN_CLR_VAL_HIZ);
• drivers/gpu/drm/i915/gt/intel_workarounds.c:424:2-424:2: WA_SET_BIT_MASKED(GEN8_ROW_CHICKEN,
• drivers/gpu/drm/i915/gt/intel_workarounds.c:428:2-428:2: WA_SET_BIT_MASKED(COMMON_SLICE_CHICKEN2,
• drivers/gpu/drm/i915/gt/intel_workarounds.c:441:3-441:3: WA_SET_BIT_MASKED(COMMON_SLICE_CHICKEN2,
• drivers/gpu/drm/i915/gt/intel_workarounds.c:445:2-445:2: WA_SET_BIT_MASKED(GEN7_HALF_SLICE_CHICKEN1,
• drivers/gpu/drm/i915/gt/intel_workarounds.c:455:2-455:2: WA_SET_BIT_MASKED(COMMON_SLICE_CHICKEN2,
• drivers/gpu/drm/i915/gt/intel_workarounds.c:465:2-465:2: WA_SET_BIT_MASKED(COMMON_SLICE_CHICKEN2,
• drivers/gpu/drm/i915/gt/intel_workarounds.c:469:2-469:2: WA_SET_BIT_MASKED(GEN7_HALF_SLICE_CHICKEN1,
• drivers/gpu/drm/i915/gt/intel_workarounds.c:479:2-479:2: WA_SET_BIT_MASKED(CNL_HDC_CHICKEN0,
• drivers/gpu/drm/i915/gt/intel_workarounds.c:484:3-484:3: WA_SET_BIT_MASKED(GEN8_ROW_CHICKEN, THROTTLE_12_5);
• drivers/gpu/drm/i915/gt/intel_workarounds.c:487:2-487:2: WA_SET_BIT_MASKED(COMMON_SLICE_CHICKEN2,
• drivers/gpu/drm/i915/gt/intel_workarounds.c:492:3-492:3: WA_SET_BIT_MASKED(COMMON_SLICE_CHICKEN2,
• drivers/gpu/drm/i915/gt/intel_workarounds.c:496:2-496:2: WA_SET_BIT_MASKED(GEN7_ROW_CHICKEN2, PUSH_CONSTANT_DEREF_DISABLE);
• drivers/gpu/drm/i915/gt/intel_workarounds.c:499:2-499:2: WA_SET_BIT_MASKED(HALF_SLICE_CHICKEN3, CNL_FAST_ANISO_L1_BANKING_FIX);
• drivers/gpu/drm/i915/gt/intel_workarounds.c:510:2-510:2: WA_SET_BIT_MASKED(GEN8_ROW_CHICKEN, DISABLE_EARLY_EOT);
• drivers/gpu/drm/i915/gt/intel_workarounds.c:528:3-528:3: WA_SET_BIT_MASKED(GEN7_ROW_CHICKEN2,
• drivers/gpu/drm/i915/gt/intel_workarounds.c:538:2-538:2: WA_SET_BIT_MASKED(ICL_HDC_MODE, HDC_FORCE_NON_COHERENT);
• drivers/gpu/drm/i915/gt/intel_workarounds.c:544:3-544:3: WA_SET_BIT_MASKED(GEN7_ROW_CHICKEN2,
• drivers/gpu/drm/i915/gt/intel_workarounds.c:549:3-549:3: WA_SET_BIT_MASKED(GEN11_COMMON_SLICE_CHICKEN3,
• drivers/gpu/drm/i915/gt/intel_workarounds.c:556:7-556:7: _MASKED_BIT_ENABLE(FLOAT_BLEND_OPTIMIZATION_ENABLE));
• drivers/gpu/drm/i915/gt/intel_workarounds.c:564:2-564:2: WA_SET_BIT_MASKED(GEN10_SAMPLER_MODE,
• drivers/gpu/drm/i915/gt/intel_workarounds.c:572:2-572:2: WA_SET_BIT_MASKED(GEN11_COMMON_SLICE_CHICKEN3,
• drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c:895:15-895:15: return (sr & SR_DISABLED) == SR_DISABLED;
• drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c:895:31-895:31: return (sr & SR_DISABLED) == SR_DISABLED;
• drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c:1023:9-1023:9: irqs = _MASKED_BIT_ENABLE(GFX_INTERRUPT_STEERING);
• drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:466:2-466:2: intel_uncore_write_fw(uncore, DMA_CTRL,
• drivers/gpu/drm/i915/gvt/handlers.c:1716:23-1716:23: (*(u32 *)p_data) &= ~_MASKED_BIT_ENABLE(1);
• drivers/gpu/drm/i915/gvt/handlers.c:1718:24-1718:24: (*(u32 *)p_data) &= ~_MASKED_BIT_ENABLE(2);
• drivers/gpu/drm/i915/gvt/handlers.c:1721:13-1721:13: if (data & _MASKED_BIT_ENABLE(1)) {
• drivers/gpu/drm/i915/gvt/handlers.c:1727:13-1727:13: data & _MASKED_BIT_ENABLE(2)) {
• drivers/gpu/drm/i915/gvt/handlers.c:1736:15-1736:15: if (((data & _MASKED_BIT_ENABLE(GFX_PPGTT_ENABLE)) ||
• drivers/gpu/drm/i915/gvt/handlers.c:1737:12-1737:12: (data & _MASKED_BIT_ENABLE(GFX_RUN_LIST_ENABLE)))
• drivers/gpu/drm/i915/gvt/handlers.c:1742:14-1742:14: if ((data & _MASKED_BIT_ENABLE(GFX_RUN_LIST_ENABLE))
• drivers/gpu/drm/i915/gvt/handlers.c:1804:13-1804:13: if (data & _MASKED_BIT_ENABLE(RESET_CTL_REQUEST_RESET))
• drivers/gpu/drm/i915/gvt/handlers.c:1819:23-1819:23: (*(u32 *)p_data) &= ~_MASKED_BIT_ENABLE(0x18);
• drivers/gpu/drm/i915/gvt/handlers.c:1822:13-1822:13: if (data & _MASKED_BIT_ENABLE(0x10) || data & _MASKED_BIT_ENABLE(0x8))
• drivers/gpu/drm/i915/gvt/handlers.c:1822:48-1822:48: if (data & _MASKED_BIT_ENABLE(0x10) || data & _MASKED_BIT_ENABLE(0x8))
• drivers/gpu/drm/i915/gvt/handlers.c:2765:2-2765:2: MMIO_RING_F(RING_REG, 4, F_RO, 0,
• drivers/gpu/drm/i915/gvt/mmio_context.c:461:3-461:3: _MASKED_BIT_ENABLE(CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT);
• drivers/gpu/drm/i915/gvt/scheduler.c:175:6-175:6: if (IS_RESTORE_INHIBIT(shadow_ring_context->ctx_ctrl.val))
• drivers/gpu/drm/i915/i915_gem_fence_reg.c:897:8-897:8: _MASKED_BIT_ENABLE(ARB_MODE_SWIZZLE_SNB));
• drivers/gpu/drm/i915/i915_gem_fence_reg.c:901:8-901:8: _MASKED_BIT_ENABLE(ARB_MODE_SWIZZLE_IVB));
• drivers/gpu/drm/i915/i915_gem_fence_reg.c:905:8-905:8: _MASKED_BIT_ENABLE(ARB_MODE_SWIZZLE_BDW));
• drivers/gpu/drm/i915/i915_gem_gtt.c:1574:3-1574:3: ENGINE_WRITE(engine,
• drivers/gpu/drm/i915/i915_gem_gtt.c:1602:8-1602:8: _MASKED_BIT_ENABLE(GFX_PPGTT_ENABLE));
• drivers/gpu/drm/i915/i915_irq.c:2534:3-2534:3: I915_WRITE(SCPD0, _MASKED_BIT_ENABLE(CSTATE_RENDER_CLOCK_GATE_DISABLE));
• drivers/gpu/drm/i915/i915_perf.c:2442:8-2442:8: _MASKED_BIT_ENABLE(GEN9_OA_DEBUG_DISABLE_CLK_RATIO_REPORTS |
• drivers/gpu/drm/i915/i915_perf.c:2468:7-2468:7: _MASKED_BIT_ENABLE(GEN12_OAG_OA_DEBUG_DISABLE_CLK_RATIO_REPORTS |
• drivers/gpu/drm/i915/i915_perf.c:2475:7-2475:7: _MASKED_BIT_ENABLE(GEN12_OAG_OA_DEBUG_DISABLE_CTX_SWITCH_REPORTS) :
• drivers/gpu/drm/i915/i915_perf.c:3870:16-3870:16: val = val & ~_MASKED_BIT_ENABLE(GEN8_ST_PO_DISABLE);
• drivers/gpu/drm/i915/i915_perf.c:3877:16-3877:16: val = val & ~_MASKED_BIT_ENABLE(HSW_WAIT_FOR_RC6_EXIT_ENABLE);
• drivers/gpu/drm/i915/intel_pm.c:365:18-365:18: val = enable ? _MASKED_BIT_ENABLE(FW_BLC_SELF_EN) :
• drivers/gpu/drm/i915/intel_pm.c:376:18-376:18: val = enable ? _MASKED_BIT_ENABLE(INSTPM_SELF_EN) :
• drivers/gpu/drm/i915/intel_pm.c:6337:2-6337:2: I915_WRITE(CACHE_MODE_0,
• drivers/gpu/drm/i915/intel_pm.c:6405:2-6405:2: I915_WRITE(_3D_CHICKEN,
• drivers/gpu/drm/i915/intel_pm.c:6448:2-6448:2: I915_WRITE(_3D_CHICKEN3,
• drivers/gpu/drm/i915/intel_pm.c:6456:2-6456:2: I915_WRITE(_3D_CHICKEN3,
• drivers/gpu/drm/i915/intel_pm.c:6566:2-6566:2: I915_WRITE(GEN9_CSFE_CHICKEN1_RCS,
• drivers/gpu/drm/i915/intel_pm.c:6613:2-6613:2: I915_WRITE(_3D_CHICKEN3,
• drivers/gpu/drm/i915/intel_pm.c:6710:2-6710:2: I915_WRITE(GEN6_RC_SLEEP_PSMI_CONTROL,
• drivers/gpu/drm/i915/intel_pm.c:6739:2-6739:2: I915_WRITE(HSW_ROW_CHICKEN3,
• drivers/gpu/drm/i915/intel_pm.c:6759:2-6759:2: I915_WRITE(CACHE_MODE_1,
• drivers/gpu/drm/i915/intel_pm.c:6774:2-6774:2: I915_WRITE(HALF_SLICE_CHICKEN3,
• drivers/gpu/drm/i915/intel_pm.c:6790:2-6790:2: I915_WRITE(_3D_CHICKEN3,
• drivers/gpu/drm/i915/intel_pm.c:6800:3-6800:3: I915_WRITE(GEN7_HALF_SLICE_CHICKEN1,
• drivers/gpu/drm/i915/intel_pm.c:6816:3-6816:3: I915_WRITE(GEN7_ROW_CHICKEN2,
• drivers/gpu/drm/i915/intel_pm.c:6820:3-6820:3: I915_WRITE(GEN7_ROW_CHICKEN2,
• drivers/gpu/drm/i915/intel_pm.c:6822:3-6822:3: I915_WRITE(GEN7_ROW_CHICKEN2_GT2,
• drivers/gpu/drm/i915/intel_pm.c:6853:2-6853:2: I915_WRITE(CACHE_MODE_1,
• drivers/gpu/drm/i915/intel_pm.c:6881:2-6881:2: I915_WRITE(_3D_CHICKEN3,
• drivers/gpu/drm/i915/intel_pm.c:6891:2-6891:2: I915_WRITE(GEN7_HALF_SLICE_CHICKEN1,
• drivers/gpu/drm/i915/intel_pm.c:6903:2-6903:2: I915_WRITE(GEN7_ROW_CHICKEN2,
• drivers/gpu/drm/i915/intel_pm.c:6930:2-6930:2: I915_WRITE(CACHE_MODE_1,
• drivers/gpu/drm/i915/intel_pm.c:6967:2-6967:2: I915_WRITE(GEN6_RC_SLEEP_PSMI_CONTROL,
• drivers/gpu/drm/i915/intel_pm.c:7003:2-7003:2: I915_WRITE(CACHE_MODE_0,
• drivers/gpu/drm/i915/intel_pm.c:7023:7-7023:7: _MASKED_BIT_ENABLE(MI_ARB_DISPLAY_TRICKLE_FEED_DISABLE));
• drivers/gpu/drm/i915/intel_pm.c:7039:2-7039:2: I915_WRITE(MI_ARB_STATE,
• drivers/gpu/drm/i915/intel_pm.c:7055:3-7055:3: I915_WRITE(ECOSKPD, _MASKED_BIT_ENABLE(ECO_GATING_CX_ONLY));
• drivers/gpu/drm/i915/intel_pm.c:7061:2-7061:2: I915_WRITE(INSTPM, _MASKED_BIT_ENABLE(INSTPM_AGPBUSY_INT_EN));
• drivers/gpu/drm/i915/intel_pm.c:7064:2-7064:2: I915_WRITE(MI_ARB_STATE, _MASKED_BIT_ENABLE(MI_ARB_C3_LP_WRITE_ENABLE));
• drivers/gpu/drm/i915/intel_pm.c:7066:2-7066:2: I915_WRITE(MI_ARB_STATE,
• drivers/gpu/drm/i915/intel_pm.c:7075:2-7075:2: I915_WRITE(MI_STATE, _MASKED_BIT_ENABLE(MI_AGPBUSY_INT_EN) |
• drivers/gpu/drm/i915/intel_pm.c:7078:2-7078:2: I915_WRITE(MEM_MODE,
• drivers/gpu/drm/i915/intel_pm.c:7084:2-7084:2: I915_WRITE(MEM_MODE,
• drivers/gpu/drm/i915/intel_uncore.c:181:3-181:3: fw_set(d, FORCEWAKE_KERNEL_FALLBACK);
• drivers/gpu/drm/i915/intel_uncore.c:213:2-213:2: fw_set(d, FORCEWAKE_KERNEL);
• drivers/gpu/drm/nouveau/nvkm/subdev/mmu/base.c:193:4-193:4: nvkm_fo64(pt->memory, 0, 0, size >> 3);
• drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgf100.c:94:2-94:2: VMM_FO064(pt, vmm, ptei * 8, 0ULL, ptes);
• drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgf100.c:337:2-337:2: nvkm_fo64(inst, 0x0200, 0x00000000, 2);
• drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgk104.c:29:2-29:2: VMM_FO064(pt, vmm, ptei * 8, BIT_ULL(1) /* PRIV. */, ptes);
• drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgm200.c:32:2-32:2: VMM_FO064(pt, vmm, ptei * 8, BIT_ULL(32) /* VOL. */, ptes);
• drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgm200.c:57:2-57:2: VMM_FO064(pt, vmm, pdei * 8, BIT_ULL(35) /* VOL_BIG. */, pdes);
• drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgp100.c:160:2-160:2: VMM_FO064(pt, vmm, ptei * 8, BIT_ULL(3) /* VOL. */, ptes);
• drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgp100.c:180:2-180:2: VMM_FO064(pt, vmm, ptei * 8, BIT_ULL(5) /* PRIV. */, ptes);
• drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmnv04.c:63:2-63:2: VMM_FO032(pt, vmm, 8 + (ptei * 4), 0, ptes);
• drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmnv41.c:64:2-64:2: VMM_FO032(pt, vmm, ptei * 4, 0, ptes);
• drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmnv50.c:94:2-94:2: VMM_FO064(pt, vmm, ptei * 8, 0ULL, ptes);
• drivers/infiniband/hw/hns/hns_roce_qp.c:360:6-360:6: if (check_shl_overflow(1, ucmd->log_sq_bb_count, &hr_qp->sq.wqe_cnt) ||
• drivers/infiniband/hw/mlx5/qp.c:6043:6-6043:6: if (check_shl_overflow(rwq->wqe_count, rwq->wqe_shift, &rwq->buf_size))
• drivers/net/wireless/rsi/rsi_91x_mgmt.c:1250:2-1250:27: u16 _a = *(const u16 *)(a);
• lib/test_overflow.c:323:9-323:9: err |= TEST_ONE_SHIFT(1, 0, u8, 1 << 0, false);
• lib/test_overflow.c:324:9-324:9: err |= TEST_ONE_SHIFT(1, 4, u8, 1 << 4, false);
• lib/test_overflow.c:325:9-325:9: err |= TEST_ONE_SHIFT(1, 7, u8, 1 << 7, false);
• lib/test_overflow.c:326:9-326:9: err |= TEST_ONE_SHIFT(0xF, 4, u8, 0xF << 4, false);
• lib/test_overflow.c:327:9-327:9: err |= TEST_ONE_SHIFT(1, 0, u16, 1 << 0, false);
• lib/test_overflow.c:328:9-328:9: err |= TEST_ONE_SHIFT(1, 10, u16, 1 << 10, false);
• lib/test_overflow.c:329:9-329:9: err |= TEST_ONE_SHIFT(1, 15, u16, 1 << 15, false);
• lib/test_overflow.c:330:9-330:9: err |= TEST_ONE_SHIFT(0xFF, 8, u16, 0xFF << 8, false);
• lib/test_overflow.c:331:9-331:9: err |= TEST_ONE_SHIFT(1, 0, int, 1 << 0, false);
• lib/test_overflow.c:332:9-332:9: err |= TEST_ONE_SHIFT(1, 16, int, 1 << 16, false);
• lib/test_overflow.c:333:9-333:9: err |= TEST_ONE_SHIFT(1, 30, int, 1 << 30, false);
• lib/test_overflow.c:334:9-334:9: err |= TEST_ONE_SHIFT(1, 0, s32, 1 << 0, false);
• lib/test_overflow.c:335:9-335:9: err |= TEST_ONE_SHIFT(1, 16, s32, 1 << 16, false);
• lib/test_overflow.c:336:9-336:9: err |= TEST_ONE_SHIFT(1, 30, s32, 1 << 30, false);
• lib/test_overflow.c:337:9-337:9: err |= TEST_ONE_SHIFT(1, 0, unsigned int, 1U << 0, false);
• lib/test_overflow.c:338:9-338:9: err |= TEST_ONE_SHIFT(1, 20, unsigned int, 1U << 20, false);
• lib/test_overflow.c:339:9-339:9: err |= TEST_ONE_SHIFT(1, 31, unsigned int, 1U << 31, false);
• lib/test_overflow.c:340:9-340:9: err |= TEST_ONE_SHIFT(0xFFFFU, 16, unsigned int, 0xFFFFU << 16, false);
• lib/test_overflow.c:341:9-341:9: err |= TEST_ONE_SHIFT(1, 0, u32, 1U << 0, false);
• lib/test_overflow.c:342:9-342:9: err |= TEST_ONE_SHIFT(1, 20, u32, 1U << 20, false);
• lib/test_overflow.c:343:9-343:9: err |= TEST_ONE_SHIFT(1, 31, u32, 1U << 31, false);
• lib/test_overflow.c:344:9-344:9: err |= TEST_ONE_SHIFT(0xFFFFU, 16, u32, 0xFFFFU << 16, false);
• lib/test_overflow.c:345:9-345:9: err |= TEST_ONE_SHIFT(1, 0, u64, 1ULL << 0, false);
• lib/test_overflow.c:346:9-346:9: err |= TEST_ONE_SHIFT(1, 40, u64, 1ULL << 40, false);
• lib/test_overflow.c:347:9-347:9: err |= TEST_ONE_SHIFT(1, 63, u64, 1ULL << 63, false);
• lib/test_overflow.c:348:9-348:9: err |= TEST_ONE_SHIFT(0xFFFFFFFFULL, 32, u64,
• lib/test_overflow.c:352:9-352:9: err |= TEST_ONE_SHIFT(0, 7, u8, 0, false);
• lib/test_overflow.c:353:9-353:9: err |= TEST_ONE_SHIFT(0, 15, u16, 0, false);
• lib/test_overflow.c:354:9-354:9: err |= TEST_ONE_SHIFT(0, 31, unsigned int, 0, false);
• lib/test_overflow.c:355:9-355:9: err |= TEST_ONE_SHIFT(0, 31, u32, 0, false);
• lib/test_overflow.c:356:9-356:9: err |= TEST_ONE_SHIFT(0, 63, u64, 0, false);
• lib/test_overflow.c:359:9-359:9: err |= TEST_ONE_SHIFT(0, 6, s8, 0, false);
• lib/test_overflow.c:360:9-360:9: err |= TEST_ONE_SHIFT(0, 14, s16, 0, false);
• lib/test_overflow.c:361:9-361:9: err |= TEST_ONE_SHIFT(0, 30, int, 0, false);
• lib/test_overflow.c:362:9-362:9: err |= TEST_ONE_SHIFT(0, 30, s32, 0, false);
• lib/test_overflow.c:363:9-363:9: err |= TEST_ONE_SHIFT(0, 62, s64, 0, false);
• lib/test_overflow.c:366:9-366:9: err |= TEST_ONE_SHIFT(1, 8, u8, 0, true);
• lib/test_overflow.c:367:9-367:9: err |= TEST_ONE_SHIFT(1, 16, u16, 0, true);
• lib/test_overflow.c:368:9-368:9: err |= TEST_ONE_SHIFT(1, 32, unsigned int, 0, true);
• lib/test_overflow.c:369:9-369:9: err |= TEST_ONE_SHIFT(1, 32, u32, 0, true);
• lib/test_overflow.c:370:9-370:9: err |= TEST_ONE_SHIFT(1, 64, u64, 0, true);
• lib/test_overflow.c:373:9-373:9: err |= TEST_ONE_SHIFT(1, 7, s8, 0, true);
• lib/test_overflow.c:374:9-374:9: err |= TEST_ONE_SHIFT(1, 15, s16, 0, true);
• lib/test_overflow.c:375:9-375:9: err |= TEST_ONE_SHIFT(1, 31, int, 0, true);
• lib/test_overflow.c:376:9-376:9: err |= TEST_ONE_SHIFT(1, 31, s32, 0, true);
• lib/test_overflow.c:377:9-377:9: err |= TEST_ONE_SHIFT(1, 63, s64, 0, true);
• lib/test_overflow.c:381:9-381:9: err |= TEST_ONE_SHIFT(150, 1, u8, 0, true);
• lib/test_overflow.c:383:9-383:9: err |= TEST_ONE_SHIFT(34966, 1, u16, 0, true);
• lib/test_overflow.c:385:9-385:9: err |= TEST_ONE_SHIFT(2215151766U, 1, u32, 0, true);
• lib/test_overflow.c:386:9-386:9: err |= TEST_ONE_SHIFT(2215151766U, 1, unsigned int, 0, true);
• lib/test_overflow.c:388:9-388:9: err |= TEST_ONE_SHIFT(9372061470395238550ULL, 1, u64, 0, true);
• lib/test_overflow.c:392:9-392:9: err |= TEST_ONE_SHIFT(75, 1, s8, 0, true);
• lib/test_overflow.c:394:9-394:9: err |= TEST_ONE_SHIFT(17483, 1, s16, 0, true);
• lib/test_overflow.c:396:9-396:9: err |= TEST_ONE_SHIFT(1107575883, 1, s32, 0, true);
• lib/test_overflow.c:397:9-397:9: err |= TEST_ONE_SHIFT(1107575883, 1, int, 0, true);
• lib/test_overflow.c:399:9-399:9: err |= TEST_ONE_SHIFT(4686030735197619275LL, 1, s64, 0, true);
• lib/test_overflow.c:403:9-403:9: err |= TEST_ONE_SHIFT(75, 2, s8, 0, true);
• lib/test_overflow.c:405:9-405:9: err |= TEST_ONE_SHIFT(17483, 2, s16, 0, true);
• lib/test_overflow.c:407:9-407:9: err |= TEST_ONE_SHIFT(1107575883, 2, s32, 0, true);
• lib/test_overflow.c:408:9-408:9: err |= TEST_ONE_SHIFT(1107575883, 2, int, 0, true);
• lib/test_overflow.c:410:9-410:9: err |= TEST_ONE_SHIFT(4686030735197619275LL, 2, s64, 0, true);
• lib/test_overflow.c:413:9-413:9: err |= TEST_ONE_SHIFT(0x100, 0, u8, 0, true);
• lib/test_overflow.c:414:9-414:9: err |= TEST_ONE_SHIFT(0xFF, 0, s8, 0, true);
• lib/test_overflow.c:415:9-415:9: err |= TEST_ONE_SHIFT(0x10000U, 0, u16, 0, true);
• lib/test_overflow.c:416:9-416:9: err |= TEST_ONE_SHIFT(0xFFFFU, 0, s16, 0, true);
• lib/test_overflow.c:417:9-417:9: err |= TEST_ONE_SHIFT(0x100000000ULL, 0, u32, 0, true);
• lib/test_overflow.c:418:9-418:9: err |= TEST_ONE_SHIFT(0x100000000ULL, 0, unsigned int, 0, true);
• lib/test_overflow.c:419:9-419:9: err |= TEST_ONE_SHIFT(0xFFFFFFFFUL, 0, s32, 0, true);
• lib/test_overflow.c:420:9-420:9: err |= TEST_ONE_SHIFT(0xFFFFFFFFUL, 0, int, 0, true);
• lib/test_overflow.c:421:9-421:9: err |= TEST_ONE_SHIFT(0xFFFFFFFFFFFFFFFFULL, 0, s64, 0, true);
• lib/test_overflow.c:424:9-424:9: err |= TEST_ONE_SHIFT(-1, 0, s8, 0, true);
• lib/test_overflow.c:425:9-425:9: err |= TEST_ONE_SHIFT(-1, 0, u8, 0, true);
• lib/test_overflow.c:426:9-426:9: err |= TEST_ONE_SHIFT(-5, 0, s16, 0, true);
• lib/test_overflow.c:427:9-427:9: err |= TEST_ONE_SHIFT(-5, 0, u16, 0, true);
• lib/test_overflow.c:428:9-428:9: err |= TEST_ONE_SHIFT(-10, 0, int, 0, true);
• lib/test_overflow.c:429:9-429:9: err |= TEST_ONE_SHIFT(-10, 0, unsigned int, 0, true);
• lib/test_overflow.c:430:9-430:9: err |= TEST_ONE_SHIFT(-100, 0, s32, 0, true);
• lib/test_overflow.c:431:9-431:9: err |= TEST_ONE_SHIFT(-100, 0, u32, 0, true);
• lib/test_overflow.c:432:9-432:9: err |= TEST_ONE_SHIFT(-10000, 0, s64, 0, true);
• lib/test_overflow.c:433:9-433:9: err |= TEST_ONE_SHIFT(-10000, 0, u64, 0, true);
• lib/test_overflow.c:436:9-436:9: err |= TEST_ONE_SHIFT(0, -5, s8, 0, true);
• lib/test_overflow.c:437:9-437:9: err |= TEST_ONE_SHIFT(0, -5, u8, 0, true);
• lib/test_overflow.c:438:9-438:9: err |= TEST_ONE_SHIFT(0, -10, s16, 0, true);
• lib/test_overflow.c:439:9-439:9: err |= TEST_ONE_SHIFT(0, -10, u16, 0, true);
• lib/test_overflow.c:440:9-440:9: err |= TEST_ONE_SHIFT(0, -15, int, 0, true);
• lib/test_overflow.c:441:9-441:9: err |= TEST_ONE_SHIFT(0, -15, unsigned int, 0, true);
• lib/test_overflow.c:442:9-442:9: err |= TEST_ONE_SHIFT(0, -20, s32, 0, true);
• lib/test_overflow.c:443:9-443:9: err |= TEST_ONE_SHIFT(0, -20, u32, 0, true);
• lib/test_overflow.c:444:9-444:9: err |= TEST_ONE_SHIFT(0, -30, s64, 0, true);
• lib/test_overflow.c:445:9-445:9: err |= TEST_ONE_SHIFT(0, -30, u64, 0, true);
• lib/test_overflow.c:448:9-448:9: err |= TEST_ONE_SHIFT(0, 8, u8, 0, true);
• lib/test_overflow.c:449:9-449:9: err |= TEST_ONE_SHIFT(0, 9, u8, 0, true);
• lib/test_overflow.c:450:9-450:9: err |= TEST_ONE_SHIFT(0, 8, s8, 0, true);
• lib/test_overflow.c:451:9-451:9: err |= TEST_ONE_SHIFT(0, 9, s8, 0, true);
• lib/test_overflow.c:452:9-452:9: err |= TEST_ONE_SHIFT(0, 16, u16, 0, true);
• lib/test_overflow.c:453:9-453:9: err |= TEST_ONE_SHIFT(0, 17, u16, 0, true);
• lib/test_overflow.c:454:9-454:9: err |= TEST_ONE_SHIFT(0, 16, s16, 0, true);
• lib/test_overflow.c:455:9-455:9: err |= TEST_ONE_SHIFT(0, 17, s16, 0, true);
• lib/test_overflow.c:456:9-456:9: err |= TEST_ONE_SHIFT(0, 32, u32, 0, true);
• lib/test_overflow.c:457:9-457:9: err |= TEST_ONE_SHIFT(0, 33, u32, 0, true);
• lib/test_overflow.c:458:9-458:9: err |= TEST_ONE_SHIFT(0, 32, int, 0, true);
• lib/test_overflow.c:459:9-459:9: err |= TEST_ONE_SHIFT(0, 33, int, 0, true);
• lib/test_overflow.c:460:9-460:9: err |= TEST_ONE_SHIFT(0, 32, s32, 0, true);
• lib/test_overflow.c:461:9-461:9: err |= TEST_ONE_SHIFT(0, 33, s32, 0, true);
• lib/test_overflow.c:462:9-462:9: err |= TEST_ONE_SHIFT(0, 64, u64, 0, true);
• lib/test_overflow.c:463:9-463:9: err |= TEST_ONE_SHIFT(0, 65, u64, 0, true);
• lib/test_overflow.c:464:9-464:9: err |= TEST_ONE_SHIFT(0, 64, s64, 0, true);
• lib/test_overflow.c:465:9-465:9: err |= TEST_ONE_SHIFT(0, 65, s64, 0, true);
• lib/test_overflow.c:476:9-476:9: err |= TEST_ONE_SHIFT(0, 7, s8, 0, false);
• lib/test_overflow.c:477:9-477:9: err |= TEST_ONE_SHIFT(0, 15, s16, 0, false);
• lib/test_overflow.c:478:9-478:9: err |= TEST_ONE_SHIFT(0, 31, int, 0, false);
• lib/test_overflow.c:479:9-479:9: err |= TEST_ONE_SHIFT(0, 31, s32, 0, false);
• lib/test_overflow.c:480:9-480:9: err |= TEST_ONE_SHIFT(0, 63, s64, 0, false);
• mm/memcontrol.c:3896:2-3896:42: const struct mem_cgroup_threshold *_a = a;