Symbol: _l

variable

Defined...

• arch/x86/events/intel/p4.c:1348:2-1348:2: rdmsr(MSR_IA32_MISC_ENABLE, low, high);
• arch/x86/hyperv/hv_apic.c:62:3-62:3: rdmsr(HV_X64_MSR_EOI, reg_val, hi);
• arch/x86/hyperv/hv_apic.c:65:3-65:3: rdmsr(HV_X64_MSR_TPR, reg_val, hi);
• arch/x86/kernel/acpi/sleep.c:96:7-96:7: if (!rdmsr_safe(MSR_IA32_MISC_ENABLE,
• arch/x86/kernel/apic/apic.c:2648:4-2648:4: rdmsr(MSR_IA32_APICBASE, l, h);
• arch/x86/kernel/cpu/amd.c:666:2-666:2: rdmsr_safe(MSR_AMD64_PATCH_LEVEL, &c->microcode, &dummy);
• arch/x86/kernel/cpu/centaur.c:32:4-32:4: rdmsr(MSR_VIA_FCR, lo, hi);
• arch/x86/kernel/cpu/centaur.c:40:4-40:4: rdmsr(MSR_VIA_RNG, lo, hi);
• arch/x86/kernel/cpu/feat_ctl.c:39:2-39:2: rdmsr(MSR_IA32_VMX_PROCBASED_CTLS, ign, supported);
• arch/x86/kernel/cpu/feat_ctl.c:45:2-45:2: rdmsr(MSR_IA32_VMX_PINBASED_CTLS, ign, supported);
• arch/x86/kernel/cpu/feat_ctl.c:42:2-42:2: rdmsr_safe(MSR_IA32_VMX_PROCBASED_CTLS2, &ign, &supported);
• arch/x86/kernel/cpu/feat_ctl.c:46:2-46:2: rdmsr_safe(MSR_IA32_VMX_VMFUNC, &ign, &funcs);
• arch/x86/kernel/cpu/feat_ctl.c:52:2-52:2: rdmsr_safe(MSR_IA32_VMX_EPT_VPID_CAP, &ept, &vpid);
• arch/x86/kernel/cpu/hygon.c:269:2-269:2: rdmsr_safe(MSR_AMD64_PATCH_LEVEL, &c->microcode, &dummy);
• arch/x86/kernel/cpu/intel.c:645:3-645:3: rdmsr(MSR_IA32_MISC_ENABLE, l1, l2);
• arch/x86/kernel/cpu/mce/amd.c:393:2-393:2: rdmsr(tr->b->address, lo, hi);
• arch/x86/kernel/cpu/mce/amd.c:222:6-222:6: if (rdmsr_safe(MSR_AMD64_SMCA_MCx_CONFIG(bank), &low, &high))
• arch/x86/kernel/cpu/mce/amd.c:228:6-228:6: if (rdmsr_safe(MSR_AMD64_SMCA_MCx_MISC(bank), &low, &high))
• arch/x86/kernel/cpu/mce/amd.c:244:7-244:7: if (!rdmsr_safe(smca_config, &low, &high)) {
• arch/x86/kernel/cpu/mce/amd.c:279:6-279:6: if (rdmsr_safe(MSR_AMD64_SMCA_MCx_IPID(bank), &low, &high)) {
• arch/x86/kernel/cpu/mce/amd.c:468:6-468:6: if (rdmsr_safe(MSR_CU_DEF_ERR, &low, &high))
• arch/x86/kernel/cpu/mce/amd.c:559:6-559:6: if (rdmsr_safe(MSR_CU_DEF_ERR, &smca_low, &smca_high))
• arch/x86/kernel/cpu/mce/amd.c:660:8-660:8: if (rdmsr_safe(address, &low, &high))
• arch/x86/kernel/cpu/mce/amd.c:1010:6-1010:6: if (rdmsr_safe(block->address, &low, &high))
• arch/x86/kernel/cpu/mce/amd.c:1241:6-1241:6: if (rdmsr_safe(address, &low, &high))
• arch/x86/kernel/cpu/mce/severity.c:239:6-239:6: if (rdmsr_safe(addr, &low, &high))
• arch/x86/kernel/cpu/mce/therm_throt.c:661:2-661:2: rdmsr(MSR_IA32_MISC_ENABLE, l, h);
• arch/x86/kernel/cpu/mce/therm_throt.c:687:4-687:4: rdmsr(MSR_THERM2_CTL, l, h);
• arch/x86/kernel/cpu/mce/therm_throt.c:698:2-698:2: rdmsr(MSR_IA32_THERM_INTERRUPT, l, h);
• arch/x86/kernel/cpu/mce/therm_throt.c:712:3-712:3: rdmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT, l, h);
• arch/x86/kernel/cpu/mce/therm_throt.c:731:2-731:2: rdmsr(MSR_IA32_MISC_ENABLE, l, h);
• arch/x86/kernel/cpu/microcode/amd.c:574:2-574:2: rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);
• arch/x86/kernel/cpu/microcode/amd.c:689:2-689:2: rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);
• arch/x86/kernel/cpu/microcode/intel.c:774:3-774:3: rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]);
• arch/x86/kernel/cpu/mtrr/cleanup.c:695:2-695:2: rdmsr(MSR_MTRRdefType, def, dummy);
• arch/x86/kernel/cpu/mtrr/cleanup.c:892:2-892:2: rdmsr(MSR_MTRRdefType, def, dummy);
• arch/x86/kernel/cpu/mtrr/cleanup.c:839:6-839:6: if (rdmsr_safe(MSR_K8_SYSCFG, &l, &h) < 0)
• arch/x86/kernel/cpu/mtrr/generic.c:57:2-57:2: rdmsr(MSR_K8_SYSCFG, lo, hi);
• arch/x86/kernel/cpu/mtrr/generic.c:318:2-318:2: rdmsr(MTRRphysBase_MSR(index), vr->base_lo, vr->base_hi);
• arch/x86/kernel/cpu/mtrr/generic.c:319:2-319:2: rdmsr(MTRRphysMask_MSR(index), vr->mask_lo, vr->mask_hi);
• arch/x86/kernel/cpu/mtrr/generic.c:343:2-343:2: rdmsr(MSR_MTRRfix64K_00000, p[0], p[1]);
• arch/x86/kernel/cpu/mtrr/generic.c:346:3-346:3: rdmsr(MSR_MTRRfix16K_80000 + i, p[2 + i * 2], p[3 + i * 2]);
• arch/x86/kernel/cpu/mtrr/generic.c:348:3-348:3: rdmsr(MSR_MTRRfix4K_C0000 + i, p[6 + i * 2], p[7 + i * 2]);
• arch/x86/kernel/cpu/mtrr/generic.c:471:2-471:2: rdmsr(MSR_MTRRcap, lo, dummy);
• arch/x86/kernel/cpu/mtrr/generic.c:479:2-479:2: rdmsr(MSR_MTRRdefType, lo, dummy);
• arch/x86/kernel/cpu/mtrr/generic.c:487:3-487:3: rdmsr(MSR_K8_TOP_MEM2, low, high);
• arch/x86/kernel/cpu/mtrr/generic.c:543:2-543:2: rdmsr(msr, lo, hi);
• arch/x86/kernel/cpu/mtrr/generic.c:592:2-592:2: rdmsr(MTRRphysMask_MSR(reg), mask_lo, mask_hi);
• arch/x86/kernel/cpu/mtrr/generic.c:602:2-602:2: rdmsr(MTRRphysBase_MSR(reg), base_lo, base_hi);
• arch/x86/kernel/cpu/mtrr/generic.c:663:2-663:2: rdmsr(MTRRphysBase_MSR(index), lo, hi);
• arch/x86/kernel/cpu/mtrr/generic.c:672:2-672:2: rdmsr(MTRRphysMask_MSR(index), lo, hi);
• arch/x86/kernel/cpu/mtrr/generic.c:767:2-767:2: rdmsr(MSR_MTRRdefType, deftype_lo, deftype_hi);
• arch/x86/kernel/cpu/mtrr/generic.c:905:2-905:2: rdmsr(MSR_MTRRcap, config, dummy);
• arch/x86/kernel/cpu/mtrr/mtrr.c:129:3-129:3: rdmsr(MSR_MTRRcap, config, dummy);
• arch/x86/kernel/cpu/resctrl/core.c:207:2-207:2: rdmsr(MSR_IA32_L3_CBM_BASE, l, h);
• arch/x86/kernel/cpu/zhaoxin.c:30:4-30:4: rdmsr(MSR_ZHAOXIN_FCR57, lo, hi);
• arch/x86/kernel/cpu/zhaoxin.c:39:4-39:4: rdmsr(MSR_ZHAOXIN_FCR57, lo, hi);
• arch/x86/kernel/process.c:852:2-852:2: rdmsr(MSR_K8_INT_PENDING_MSG, lo, hi);
• arch/x86/kernel/tsc_msr.c:181:3-181:3: rdmsr(MSR_PLATFORM_INFO, lo, hi);
• arch/x86/kernel/tsc_msr.c:184:3-184:3: rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
• arch/x86/kernel/tsc_msr.c:189:2-189:2: rdmsr(MSR_FSB_FREQ, lo, hi);
• arch/x86/kvm/vmx/nested.c:6296:2-6296:2: rdmsr(MSR_IA32_VMX_PINBASED_CTLS,
• arch/x86/kvm/vmx/nested.c:6311:2-6311:2: rdmsr(MSR_IA32_VMX_EXIT_CTLS,
• arch/x86/kvm/vmx/nested.c:6331:2-6331:2: rdmsr(MSR_IA32_VMX_ENTRY_CTLS,
• arch/x86/kvm/vmx/nested.c:6348:2-6348:2: rdmsr(MSR_IA32_VMX_PROCBASED_CTLS,
• arch/x86/kvm/vmx/nested.c:6387:3-6387:3: rdmsr(MSR_IA32_VMX_PROCBASED_CTLS2,
• arch/x86/kvm/vmx/nested.c:6467:2-6467:2: rdmsr(MSR_IA32_VMX_MISC,
• arch/x86/kvm/vmx/vmx.c:2393:2-2393:2: rdmsr(msr, vmx_msr_low, vmx_msr_high);
• arch/x86/kvm/vmx/vmx.c:2570:2-2570:2: rdmsr(MSR_IA32_VMX_BASIC, vmx_msr_low, vmx_msr_high);
• arch/x86/kvm/vmx/vmx.c:4018:2-4018:2: rdmsr(MSR_IA32_SYSENTER_CS, low32, high32);
• arch/x86/kvm/vmx/vmx.c:4024:3-4024:3: rdmsr(MSR_IA32_CR_PAT, low32, high32);
• arch/x86/kvm/vmx/vmx.c:2487:2-2487:2: rdmsr_safe(MSR_IA32_VMX_EPT_VPID_CAP,
• arch/x86/kvm/vmx/vmx.c:6960:7-6960:7: if (rdmsr_safe(index, &data_low, &data_high) < 0)
• arch/x86/kvm/x86.c:5386:7-5386:7: if (rdmsr_safe(msrs_to_save_all[i], &dummy[0], &dummy[1]) < 0)
• arch/x86/lib/msr-smp.c:19:2-19:2: rdmsr(rv->msr_no, reg->l, reg->h);
• arch/x86/lib/msr-smp.c:158:16-158:16: rv->msr.err = rdmsr_safe(rv->msr.msr_no, &rv->msr.reg.l, &rv->msr.reg.h);
• arch/x86/oprofile/op_model_p4.c:534:4-534:4: rdmsr(ev->bindings[i].escr_address, escr, high);
• arch/x86/oprofile/op_model_p4.c:548:4-548:4: rdmsr(p4_counters[VIRT_CTR(stag, ctr)].cccr_address,
• arch/x86/oprofile/op_model_p4.c:578:2-578:2: rdmsr(MSR_IA32_MISC_ENABLE, low, high);
• arch/x86/oprofile/op_model_p4.c:588:3-588:3: rdmsr(p4_counters[VIRT_CTR(stag, i)].cccr_address, low, high);
• arch/x86/oprofile/op_model_p4.c:647:3-647:3: rdmsr(p4_counters[real].cccr_address, low, high);
• arch/x86/oprofile/op_model_p4.c:648:3-648:3: rdmsr(p4_counters[real].counter_address, ctr, high);
• arch/x86/oprofile/op_model_p4.c:678:3-678:3: rdmsr(p4_counters[VIRT_CTR(stag, i)].cccr_address, low, high);
• arch/x86/oprofile/op_model_p4.c:695:3-695:3: rdmsr(p4_counters[VIRT_CTR(stag, i)].cccr_address, low, high);
• arch/x86/pci/mmconfig-shared.c:200:6-200:6: if (rdmsr_safe(address, &low, &high))
• drivers/acpi/processor_perflib.c:269:3-269:3: rdmsr(MSR_AMD_PSTATE_DEF_BASE + index, lo, hi);
• drivers/acpi/processor_throttling.c:723:3-723:3: rdmsr_safe(MSR_IA32_THERM_CONTROL,
• drivers/char/hw_random/via-rng.c:153:2-153:2: rdmsr(MSR_VIA_RNG, lo, hi);
• drivers/char/hw_random/via-rng.c:177:2-177:2: rdmsr(MSR_VIA_RNG, lo, hi);
• drivers/cpufreq/acpi-cpufreq.c:249:2-249:2: rdmsr(MSR_IA32_PERF_CTL, val, dummy);
• drivers/cpufreq/acpi-cpufreq.c:257:2-257:2: rdmsr(MSR_IA32_PERF_CTL, lo, hi);
• drivers/cpufreq/acpi-cpufreq.c:266:2-266:2: rdmsr(MSR_AMD_PERF_CTL, val, dummy);
• drivers/cpufreq/powernow-k8.c:91:2-91:2: rdmsr(MSR_FIDVID_STATUS, lo, hi);
• drivers/cpufreq/powernow-k8.c:109:3-109:3: rdmsr(MSR_FIDVID_STATUS, lo, hi);
• drivers/cpufreq/powernow-k8.c:136:2-136:2: rdmsr(MSR_FIDVID_STATUS, lo, hi);
• drivers/cpufreq/powernow-k8.c:294:2-294:2: rdmsr(MSR_FIDVID_STATUS, lo, maxvid);
• drivers/cpufreq/speedstep-centrino.c:381:2-381:2: rdmsr(MSR_IA32_MISC_ENABLE, l, h);
• drivers/cpufreq/speedstep-centrino.c:389:3-389:3: rdmsr(MSR_IA32_MISC_ENABLE, l, h);
• drivers/cpufreq/speedstep-lib.c:75:2-75:2: rdmsr(MSR_IA32_EBL_CR_POWERON, msr_lo, msr_tmp);
• drivers/cpufreq/speedstep-lib.c:112:2-112:2: rdmsr(MSR_IA32_EBL_CR_POWERON, msr_lo, msr_tmp);
• drivers/cpufreq/speedstep-lib.c:135:2-135:2: rdmsr(MSR_FSB_FREQ, msr_lo, msr_tmp);
• drivers/cpufreq/speedstep-lib.c:160:2-160:2: rdmsr(MSR_IA32_EBL_CR_POWERON, msr_lo, msr_tmp);
• drivers/cpufreq/speedstep-lib.c:189:2-189:2: rdmsr(0x2c, msr_lo, msr_hi);
• drivers/cpufreq/speedstep-lib.c:345:3-345:3: rdmsr(MSR_IA32_EBL_CR_POWERON, msr_lo, msr_hi);
• drivers/cpufreq/speedstep-lib.c:358:3-358:3: rdmsr(MSR_IA32_PLATFORM_ID, msr_lo, msr_hi);
• drivers/edac/mce_amd.c:1069:8-1069:8: if (!rdmsr_safe(addr, &low, &high) &&
• drivers/gpio/gpio-cs5535.c:155:2-155:2: rdmsr(MSR_PIC_ZSEL_HIGH, lo, hi);
• drivers/hwmon/hwmon-vid.c:241:2-241:2: rdmsr(0x198, dummy, vid);
• drivers/hwmon/hwmon-vid.c:244:2-244:2: rdmsr(0x1154, brand, dummy);
• drivers/iommu/io-pgtable-arm-v7s.c:427:18-427:18: tblp = ptep - ARM_V7S_LVL_IDX(iova, lvl);
• drivers/iommu/io-pgtable-arm-v7s.c:480:10-480:10: ptep += ARM_V7S_LVL_IDX(iova, lvl);
• drivers/iommu/io-pgtable-arm-v7s.c:607:14-607:14: unmap_idx = ARM_V7S_LVL_IDX(iova, 2);
• drivers/iommu/io-pgtable-arm-v7s.c:649:8-649:8: idx = ARM_V7S_LVL_IDX(iova, lvl);
• drivers/iommu/io-pgtable-arm-v7s.c:735:11-735:11: ptep += ARM_V7S_LVL_IDX(iova, ++lvl);
• drivers/isdn/capi/capiutil.c:516:5-516:25: unsigned _l = cmsg->l;
• drivers/misc/cs5535-mfgpt.c:84:2-84:2: rdmsr(msr, value, dummy);
• drivers/misc/cs5535-mfgpt.c:115:2-115:2: rdmsr(MSR_PIC_ZSEL_LOW, zsel, dummy);
• drivers/misc/cs5535-mfgpt.c:129:2-129:2: rdmsr(MSR_PIC_IRQM_LPC, lpc, dummy);
• drivers/powercap/intel_rapl_common.c:829:2-829:2: rdmsr_safe(MSR_IA32_PACKAGE_THERM_INTERRUPT, &l, &h);
• drivers/powercap/intel_rapl_common.c:871:2-871:2: rdmsr_safe(MSR_IA32_PACKAGE_THERM_INTERRUPT, &l, &h);
• drivers/thermal/intel/int340x_thermal/processor_thermal_device.c:223:8-223:8: err = rdmsr_safe(MSR_IA32_TEMPERATURE_TARGET, &eax, &edx);
• drivers/thermal/intel/intel_soc_dts_iosf.c:54:8-54:8: err = rdmsr_safe(MSR_IA32_TEMPERATURE_TARGET, &eax, &edx);
• drivers/thermal/intel/x86_pkg_temp_thermal.c:239:2-239:2: rdmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT, l, h);
• drivers/thermal/intel/x86_pkg_temp_thermal.c:255:2-255:2: rdmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT, l, h);
• drivers/thermal/intel/x86_pkg_temp_thermal.c:373:2-373:2: rdmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT, zonedev->msr_pkg_therm_low,
• drivers/video/fbdev/geode/display_gx.c:28:3-28:3: rdmsr(MSR_GLIU_P2D_RO0, lo, hi);
• drivers/video/fbdev/geode/lxfb_ops.c:129:2-129:2: rdmsr(MSR_GLCP_DOTPLL, dotpll_lo, dotpll_hi);
• drivers/video/fbdev/geode/lxfb_ops.c:147:3-147:3: rdmsr(MSR_GLCP_DOTPLL, dotpll_lo, dotpll_hi);
• drivers/video/fbdev/geode/lxfb_ops.c:318:3-318:3: rdmsr(MSR_GLIU_P2D_RO0, lo, hi);
• include/linux/cs5535.h:54:2-54:2: rdmsr(MSR_PIC_ZSEL_HIGH, lo, hi);
• net/rxrpc/key.c:1154:2-1154:2: ENCODE_DATA(cnlen, key->description + 4); /* cellname */
• net/rxrpc/key.c:1168:4-1168:4: ENCODE_DATA(8, token->kad->session_key);
• net/rxrpc/key.c:1172:4-1172:4: ENCODE_DATA(token->kad->ticket_len, token->kad->ticket);
• net/rxrpc/key.c:1179:5-1179:5: ENCODE_STR(princ->name_parts[loop]);
• net/rxrpc/key.c:1180:4-1180:4: ENCODE_STR(princ->realm);
• net/rxrpc/key.c:1185:5-1185:5: ENCODE_STR(princ->name_parts[loop]);
• net/rxrpc/key.c:1186:4-1186:4: ENCODE_STR(princ->realm);
• net/rxrpc/key.c:1189:4-1189:4: ENCODE_DATA(token->k5->session.data_len,
• net/rxrpc/key.c:1202:5-1202:5: ENCODE_DATA(token->k5->addresses[loop].data_len,
• net/rxrpc/key.c:1206:4-1206:4: ENCODE_DATA(token->k5->ticket_len, token->k5->ticket);
• net/rxrpc/key.c:1207:4-1207:4: ENCODE_DATA(token->k5->ticket2_len, token->k5->ticket2);
• net/rxrpc/key.c:1212:5-1212:5: ENCODE_DATA(token->k5->authdata[loop].data_len,
• net/tipc/node.c:941:2-941:24: struct tipc_link *l, *_l, *tnl;