Symbol: _l

variable

Defined...

arch/x86/events/intel/p4.c:1347:2-1347:2: rdmsr(MSR_IA32_MISC_ENABLE, low, high);
arch/x86/hyperv/hv_apic.c:62:3-62:3: rdmsr(HV_X64_MSR_EOI, reg_val, hi);
arch/x86/hyperv/hv_apic.c:65:3-65:3: rdmsr(HV_X64_MSR_TPR, reg_val, hi);
arch/x86/kernel/acpi/sleep.c:85:7-85:7: if (!rdmsr_safe(MSR_IA32_MISC_ENABLE,
arch/x86/kernel/apic/apic.c:2547:4-2547:4: rdmsr(MSR_IA32_APICBASE, l, h);
arch/x86/kernel/cpu/amd.c:638:2-638:2: rdmsr_safe(MSR_AMD64_PATCH_LEVEL, &c->microcode, &dummy);
arch/x86/kernel/cpu/centaur.c:38:4-38:4: rdmsr(MSR_VIA_FCR, lo, hi);
arch/x86/kernel/cpu/centaur.c:46:4-46:4: rdmsr(MSR_VIA_RNG, lo, hi);
arch/x86/kernel/cpu/centaur.c:126:2-126:2: rdmsr(MSR_IA32_VMX_PROCBASED_CTLS, vmx_msr_low, vmx_msr_high);
arch/x86/kernel/cpu/centaur.c:134:3-134:3: rdmsr(MSR_IA32_VMX_PROCBASED_CTLS2,
arch/x86/kernel/cpu/hygon.c:268:2-268:2: rdmsr_safe(MSR_AMD64_PATCH_LEVEL, &c->microcode, &dummy);
arch/x86/kernel/cpu/intel.c:490:2-490:2: rdmsr(MSR_IA32_VMX_PROCBASED_CTLS, vmx_msr_low, vmx_msr_high);
arch/x86/kernel/cpu/intel.c:497:3-497:3: rdmsr(MSR_IA32_VMX_PROCBASED_CTLS2,
arch/x86/kernel/cpu/intel.c:505:4-505:4: rdmsr(MSR_IA32_VMX_EPT_VPID_CAP,
arch/x86/kernel/cpu/intel.c:666:3-666:3: rdmsr(MSR_IA32_MISC_ENABLE, l1, l2);
arch/x86/kernel/cpu/mce/amd.c:360:2-360:2: rdmsr(tr->b->address, lo, hi);
arch/x86/kernel/cpu/mce/amd.c:217:7-217:7: if (!rdmsr_safe(smca_config, &low, &high)) {
arch/x86/kernel/cpu/mce/amd.c:435:6-435:6: if (rdmsr_safe(MSR_CU_DEF_ERR, &low, &high))
arch/x86/kernel/cpu/mce/amd.c:475:6-475:6: if (rdmsr_safe(MSR_AMD64_SMCA_MCx_CONFIG(bank), &low, &high))
arch/x86/kernel/cpu/mce/amd.c:481:7-481:7: if (!rdmsr_safe(MSR_AMD64_SMCA_MCx_MISC(bank), &low, &high) &&
arch/x86/kernel/cpu/mce/amd.c:547:6-547:6: if (rdmsr_safe(MSR_CU_DEF_ERR, &smca_low, &smca_high))
arch/x86/kernel/cpu/mce/amd.c:642:8-642:8: if (rdmsr_safe(address, &low, &high))
arch/x86/kernel/cpu/mce/amd.c:993:6-993:6: if (rdmsr_safe(block->address, &low, &high))
arch/x86/kernel/cpu/mce/severity.c:235:6-235:6: if (rdmsr_safe(addr, &low, &high))
arch/x86/kernel/cpu/mce/therm_throt.c:442:2-442:2: rdmsr(MSR_IA32_MISC_ENABLE, l, h);
arch/x86/kernel/cpu/mce/therm_throt.c:468:4-468:4: rdmsr(MSR_THERM2_CTL, l, h);
arch/x86/kernel/cpu/mce/therm_throt.c:479:2-479:2: rdmsr(MSR_IA32_THERM_INTERRUPT, l, h);
arch/x86/kernel/cpu/mce/therm_throt.c:493:3-493:3: rdmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT, l, h);
arch/x86/kernel/cpu/mce/therm_throt.c:512:2-512:2: rdmsr(MSR_IA32_MISC_ENABLE, l, h);
arch/x86/kernel/cpu/microcode/amd.c:574:2-574:2: rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);
arch/x86/kernel/cpu/microcode/amd.c:689:2-689:2: rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);
arch/x86/kernel/cpu/microcode/intel.c:774:3-774:3: rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]);
arch/x86/kernel/cpu/mtrr/cleanup.c:695:2-695:2: rdmsr(MSR_MTRRdefType, def, dummy);
arch/x86/kernel/cpu/mtrr/cleanup.c:892:2-892:2: rdmsr(MSR_MTRRdefType, def, dummy);
arch/x86/kernel/cpu/mtrr/cleanup.c:839:6-839:6: if (rdmsr_safe(MSR_K8_SYSCFG, &l, &h) < 0)
arch/x86/kernel/cpu/mtrr/generic.c:57:2-57:2: rdmsr(MSR_K8_SYSCFG, lo, hi);
arch/x86/kernel/cpu/mtrr/generic.c:318:2-318:2: rdmsr(MTRRphysBase_MSR(index), vr->base_lo, vr->base_hi);
arch/x86/kernel/cpu/mtrr/generic.c:319:2-319:2: rdmsr(MTRRphysMask_MSR(index), vr->mask_lo, vr->mask_hi);
arch/x86/kernel/cpu/mtrr/generic.c:343:2-343:2: rdmsr(MSR_MTRRfix64K_00000, p[0], p[1]);
arch/x86/kernel/cpu/mtrr/generic.c:346:3-346:3: rdmsr(MSR_MTRRfix16K_80000 + i, p[2 + i * 2], p[3 + i * 2]);
arch/x86/kernel/cpu/mtrr/generic.c:348:3-348:3: rdmsr(MSR_MTRRfix4K_C0000 + i, p[6 + i * 2], p[7 + i * 2]);
arch/x86/kernel/cpu/mtrr/generic.c:471:2-471:2: rdmsr(MSR_MTRRcap, lo, dummy);
arch/x86/kernel/cpu/mtrr/generic.c:479:2-479:2: rdmsr(MSR_MTRRdefType, lo, dummy);
arch/x86/kernel/cpu/mtrr/generic.c:487:3-487:3: rdmsr(MSR_K8_TOP_MEM2, low, high);
arch/x86/kernel/cpu/mtrr/generic.c:543:2-543:2: rdmsr(msr, lo, hi);
arch/x86/kernel/cpu/mtrr/generic.c:592:2-592:2: rdmsr(MTRRphysMask_MSR(reg), mask_lo, mask_hi);
arch/x86/kernel/cpu/mtrr/generic.c:602:2-602:2: rdmsr(MTRRphysBase_MSR(reg), base_lo, base_hi);
arch/x86/kernel/cpu/mtrr/generic.c:663:2-663:2: rdmsr(MTRRphysBase_MSR(index), lo, hi);
arch/x86/kernel/cpu/mtrr/generic.c:672:2-672:2: rdmsr(MTRRphysMask_MSR(index), lo, hi);
arch/x86/kernel/cpu/mtrr/generic.c:759:2-759:2: rdmsr(MSR_MTRRdefType, deftype_lo, deftype_hi);
arch/x86/kernel/cpu/mtrr/generic.c:894:2-894:2: rdmsr(MSR_MTRRcap, config, dummy);
arch/x86/kernel/cpu/mtrr/mtrr.c:129:3-129:3: rdmsr(MSR_MTRRcap, config, dummy);
arch/x86/kernel/cpu/resctrl/core.c:207:2-207:2: rdmsr(MSR_IA32_L3_CBM_BASE, l, h);
arch/x86/kernel/process.c:747:2-747:2: rdmsr(MSR_K8_INT_PENDING_MSG, lo, hi);
arch/x86/kernel/tsc_msr.c:90:3-90:3: rdmsr(MSR_PLATFORM_INFO, lo, hi);
arch/x86/kernel/tsc_msr.c:93:3-93:3: rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
arch/x86/kernel/tsc_msr.c:98:2-98:2: rdmsr(MSR_FSB_FREQ, lo, hi);
arch/x86/kvm/vmx/nested.c:5532:2-5532:2: rdmsr(MSR_IA32_VMX_PINBASED_CTLS,
arch/x86/kvm/vmx/nested.c:5547:2-5547:2: rdmsr(MSR_IA32_VMX_EXIT_CTLS,
arch/x86/kvm/vmx/nested.c:5567:2-5567:2: rdmsr(MSR_IA32_VMX_ENTRY_CTLS,
arch/x86/kvm/vmx/nested.c:5584:2-5584:2: rdmsr(MSR_IA32_VMX_PROCBASED_CTLS,
arch/x86/kvm/vmx/nested.c:5622:3-5622:3: rdmsr(MSR_IA32_VMX_PROCBASED_CTLS2,
arch/x86/kvm/vmx/nested.c:5695:2-5695:2: rdmsr(MSR_IA32_VMX_MISC,
arch/x86/kvm/vmx/vmx.c:2179:2-2179:2: rdmsr(msr, vmx_msr_low, vmx_msr_high);
arch/x86/kvm/vmx/vmx.c:2354:2-2354:2: rdmsr(MSR_IA32_VMX_BASIC, vmx_msr_low, vmx_msr_high);
arch/x86/kvm/vmx/vmx.c:3776:2-3776:2: rdmsr(MSR_IA32_SYSENTER_CS, low32, high32);
arch/x86/kvm/vmx/vmx.c:3782:3-3782:3: rdmsr(MSR_IA32_CR_PAT, low32, high32);
arch/x86/kvm/vmx/vmx.c:2271:2-2271:2: rdmsr_safe(MSR_IA32_VMX_EPT_VPID_CAP,
arch/x86/kvm/vmx/vmx.c:4074:7-4074:7: if (rdmsr_safe(index, &data_low, &data_high) < 0)
arch/x86/kvm/x86.c:4942:7-4942:7: if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
arch/x86/lib/msr-smp.c:19:2-19:2: rdmsr(rv->msr_no, reg->l, reg->h);
arch/x86/lib/msr-smp.c:158:16-158:16: rv->msr.err = rdmsr_safe(rv->msr.msr_no, &rv->msr.reg.l, &rv->msr.reg.h);
arch/x86/oprofile/op_model_p4.c:534:4-534:4: rdmsr(ev->bindings[i].escr_address, escr, high);
arch/x86/oprofile/op_model_p4.c:548:4-548:4: rdmsr(p4_counters[VIRT_CTR(stag, ctr)].cccr_address,
arch/x86/oprofile/op_model_p4.c:578:2-578:2: rdmsr(MSR_IA32_MISC_ENABLE, low, high);
arch/x86/oprofile/op_model_p4.c:588:3-588:3: rdmsr(p4_counters[VIRT_CTR(stag, i)].cccr_address, low, high);
arch/x86/oprofile/op_model_p4.c:647:3-647:3: rdmsr(p4_counters[real].cccr_address, low, high);
arch/x86/oprofile/op_model_p4.c:648:3-648:3: rdmsr(p4_counters[real].counter_address, ctr, high);
arch/x86/oprofile/op_model_p4.c:678:3-678:3: rdmsr(p4_counters[VIRT_CTR(stag, i)].cccr_address, low, high);
arch/x86/oprofile/op_model_p4.c:695:3-695:3: rdmsr(p4_counters[VIRT_CTR(stag, i)].cccr_address, low, high);
arch/x86/pci/mmconfig-shared.c:199:6-199:6: if (rdmsr_safe(address, &low, &high))
drivers/acpi/processor_perflib.c:283:3-283:3: rdmsr(MSR_AMD_PSTATE_DEF_BASE + index, lo, hi);
drivers/acpi/processor_throttling.c:723:3-723:3: rdmsr_safe(MSR_IA32_THERM_CONTROL,
drivers/char/hw_random/via-rng.c:153:2-153:2: rdmsr(MSR_VIA_RNG, lo, hi);
drivers/char/hw_random/via-rng.c:177:2-177:2: rdmsr(MSR_VIA_RNG, lo, hi);
drivers/cpufreq/acpi-cpufreq.c:246:2-246:2: rdmsr(MSR_IA32_PERF_CTL, val, dummy);
drivers/cpufreq/acpi-cpufreq.c:254:2-254:2: rdmsr(MSR_IA32_PERF_CTL, lo, hi);
drivers/cpufreq/acpi-cpufreq.c:263:2-263:2: rdmsr(MSR_AMD_PERF_CTL, val, dummy);
drivers/cpufreq/powernow-k8.c:91:2-91:2: rdmsr(MSR_FIDVID_STATUS, lo, hi);
drivers/cpufreq/powernow-k8.c:109:3-109:3: rdmsr(MSR_FIDVID_STATUS, lo, hi);
drivers/cpufreq/powernow-k8.c:136:2-136:2: rdmsr(MSR_FIDVID_STATUS, lo, hi);
drivers/cpufreq/powernow-k8.c:294:2-294:2: rdmsr(MSR_FIDVID_STATUS, lo, maxvid);
drivers/cpufreq/speedstep-centrino.c:381:2-381:2: rdmsr(MSR_IA32_MISC_ENABLE, l, h);
drivers/cpufreq/speedstep-centrino.c:389:3-389:3: rdmsr(MSR_IA32_MISC_ENABLE, l, h);
drivers/cpufreq/speedstep-lib.c:75:2-75:2: rdmsr(MSR_IA32_EBL_CR_POWERON, msr_lo, msr_tmp);
drivers/cpufreq/speedstep-lib.c:112:2-112:2: rdmsr(MSR_IA32_EBL_CR_POWERON, msr_lo, msr_tmp);
drivers/cpufreq/speedstep-lib.c:135:2-135:2: rdmsr(MSR_FSB_FREQ, msr_lo, msr_tmp);
drivers/cpufreq/speedstep-lib.c:160:2-160:2: rdmsr(MSR_IA32_EBL_CR_POWERON, msr_lo, msr_tmp);
drivers/cpufreq/speedstep-lib.c:189:2-189:2: rdmsr(0x2c, msr_lo, msr_hi);
drivers/cpufreq/speedstep-lib.c:345:3-345:3: rdmsr(MSR_IA32_EBL_CR_POWERON, msr_lo, msr_hi);
drivers/cpufreq/speedstep-lib.c:358:3-358:3: rdmsr(MSR_IA32_PLATFORM_ID, msr_lo, msr_hi);
drivers/edac/mce_amd.c:1062:8-1062:8: if (!rdmsr_safe(addr, &low, &high) &&
drivers/gpio/gpio-cs5535.c:155:2-155:2: rdmsr(MSR_PIC_ZSEL_HIGH, lo, hi);
drivers/hwmon/hwmon-vid.c:241:2-241:2: rdmsr(0x198, dummy, vid);
drivers/hwmon/hwmon-vid.c:244:2-244:2: rdmsr(0x1154, brand, dummy);
drivers/iommu/io-pgtable-arm-v7s.c:385:18-385:18: tblp = ptep - ARM_V7S_LVL_IDX(iova, lvl);
drivers/iommu/io-pgtable-arm-v7s.c:438:10-438:10: ptep += ARM_V7S_LVL_IDX(iova, lvl);
drivers/iommu/io-pgtable-arm-v7s.c:564:14-564:14: unmap_idx = ARM_V7S_LVL_IDX(iova, 2);
drivers/iommu/io-pgtable-arm-v7s.c:606:8-606:8: idx = ARM_V7S_LVL_IDX(iova, lvl);
drivers/iommu/io-pgtable-arm-v7s.c:693:11-693:11: ptep += ARM_V7S_LVL_IDX(iova, ++lvl);
drivers/isdn/capi/capiutil.c:288:5-288:25: unsigned _l = cmsg->l;
drivers/isdn/capi/capiutil.c:368:5-368:25: unsigned _l = cmsg->l;
drivers/isdn/capi/capiutil.c:700:5-700:25: unsigned _l = cmsg->l;
drivers/misc/cs5535-mfgpt.c:84:2-84:2: rdmsr(msr, value, dummy);
drivers/misc/cs5535-mfgpt.c:115:2-115:2: rdmsr(MSR_PIC_ZSEL_LOW, zsel, dummy);
drivers/misc/cs5535-mfgpt.c:129:2-129:2: rdmsr(MSR_PIC_IRQM_LPC, lpc, dummy);
drivers/powercap/intel_rapl.c:953:2-953:2: rdmsr_safe(MSR_IA32_PACKAGE_THERM_INTERRUPT, &l, &h);
drivers/powercap/intel_rapl.c:996:2-996:2: rdmsr_safe(MSR_IA32_PACKAGE_THERM_INTERRUPT, &l, &h);
drivers/thermal/intel/int340x_thermal/processor_thermal_device.c:137:8-137:8: err = rdmsr_safe(MSR_IA32_TEMPERATURE_TARGET, &eax, &edx);
drivers/thermal/intel/intel_soc_dts_iosf.c:53:8-53:8: err = rdmsr_safe(MSR_IA32_TEMPERATURE_TARGET, &eax, &edx);
drivers/thermal/intel/x86_pkg_temp_thermal.c:252:2-252:2: rdmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT, l, h);
drivers/thermal/intel/x86_pkg_temp_thermal.c:268:2-268:2: rdmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT, l, h);
drivers/thermal/intel/x86_pkg_temp_thermal.c:380:2-380:2: rdmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT, pkgdev->msr_pkg_therm_low,
drivers/video/fbdev/geode/display_gx.c:28:3-28:3: rdmsr(MSR_GLIU_P2D_RO0, lo, hi);
drivers/video/fbdev/geode/lxfb_ops.c:129:2-129:2: rdmsr(MSR_GLCP_DOTPLL, dotpll_lo, dotpll_hi);
drivers/video/fbdev/geode/lxfb_ops.c:147:3-147:3: rdmsr(MSR_GLCP_DOTPLL, dotpll_lo, dotpll_hi);
drivers/video/fbdev/geode/lxfb_ops.c:318:3-318:3: rdmsr(MSR_GLIU_P2D_RO0, lo, hi);
include/linux/cs5535.h:54:2-54:2: rdmsr(MSR_PIC_ZSEL_HIGH, lo, hi);
net/rxrpc/key.c:1158:2-1158:2: ENCODE_DATA(cnlen, key->description + 4); /* cellname */
net/rxrpc/key.c:1172:4-1172:4: ENCODE_DATA(8, token->kad->session_key);
net/rxrpc/key.c:1176:4-1176:4: ENCODE_DATA(token->kad->ticket_len, token->kad->ticket);
net/rxrpc/key.c:1183:5-1183:5: ENCODE_STR(princ->name_parts[loop]);
net/rxrpc/key.c:1184:4-1184:4: ENCODE_STR(princ->realm);
net/rxrpc/key.c:1189:5-1189:5: ENCODE_STR(princ->name_parts[loop]);
net/rxrpc/key.c:1190:4-1190:4: ENCODE_STR(princ->realm);
net/rxrpc/key.c:1193:4-1193:4: ENCODE_DATA(token->k5->session.data_len,
net/rxrpc/key.c:1206:5-1206:5: ENCODE_DATA(token->k5->addresses[loop].data_len,
net/rxrpc/key.c:1210:4-1210:4: ENCODE_DATA(token->k5->ticket_len, token->k5->ticket);
net/rxrpc/key.c:1211:4-1211:4: ENCODE_DATA(token->k5->ticket2_len, token->k5->ticket2);
net/rxrpc/key.c:1216:5-1216:5: ENCODE_DATA(token->k5->authdata[loop].data_len,
net/tipc/node.c:812:2-812:24: struct tipc_link *l, *_l, *tnl;